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13 Commits

Author SHA1 Message Date
Rémi Denis-Courmont 9238f6cb41 lavu/float_dsp: R-V V scalarproduct_double 
C908:
scalarproduct_double_c:       39.2
scalarproduct_double_rvv_f64: 10.5

X60:
scalarproduct_double_c:       35.0
scalarproduct_double_rvv_f64:  5.2
 2024-05-31 22:22:43 +03:00
Rémi Denis-Courmont b6585eb04c lavu: add/use flag for RISC-V Zba extension 
The code was blindly assuming that Zbb or V implied Zba. While the
earlier is practically always true, the later broke some QEMU setups,
as V was introduced earlier than Zba.
 2023-07-19 19:29:35 +03:00
Rémi Denis-Courmont cd77662953 lavu/floatdsp: RISC-V V scalarproduct_float 2022-09-27 13:19:52 +02:00
Rémi Denis-Courmont b493370662 lavu/floatdsp: RISC-V V vector_fmul_window 2022-09-27 13:19:52 +02:00
Rémi Denis-Courmont 9aeb6aca3a lavu/floatdsp: RISC-V V vector_fmul_reverse 2022-09-27 13:19:52 +02:00
Rémi Denis-Courmont 47ce9735cc lavu/floatdsp: RISC-V V butterflies_float 2022-09-27 13:19:52 +02:00
Rémi Denis-Courmont f4ea45040f lavu/floatdsp: RISC-V V vector_fmul_add 2022-09-27 13:19:52 +02:00
Rémi Denis-Courmont d120ab5b91 lavu/floatdsp: RISC-V V vector_dmac_scalar 2022-09-27 13:19:52 +02:00
Rémi Denis-Courmont c3db27ba95 lavu/floatdsp: RISC-V V vector_fmac_scalar 2022-09-27 13:19:52 +02:00
Rémi Denis-Courmont da169a210d lavu/floatdsp: RISC-V V vector_dmul 2022-09-27 13:19:52 +02:00
Rémi Denis-Courmont 7058af9969 lavu/floatdsp: RISC-V V vector_fmul 2022-09-27 13:19:52 +02:00
Rémi Denis-Courmont 89b7ec65a8 lavu/floatdsp: RISC-V V vector_dmul_scalar 2022-09-27 13:19:52 +02:00
Rémi Denis-Courmont a6c10d05fe lavu/floatdsp: RISC-V V vector_fmul_scalar 
This is based on existing code from the VLC git tree with two minor
changes to account for the different function prototypes.
 2022-09-27 13:19:52 +02:00