mirror of https://code.videolan.org/videolan/x264
loongarch: Init LSX/LASX support
LSX/LASX is the LOONGARCH 128-bit/256-bit SIMD Architecture. Signed-off-by: Shiyou Yin <yinshiyou-hf@loongson.cn> Signed-off-by: Xiwei Gu <guxiwei-hf@loongson.cn>
This commit is contained in:
Loongson Technology Corporation Limited
Shiyou Yin
parent
5a9dfddea4
commit
1ecc51ee97
14
Makefile
14
Makefile
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@ -197,6 +197,20 @@ SRCS_X += common/mips/dct-c.c \
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endif
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endif
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# LOONGARCH optimization
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ifeq ($(SYS_ARCH),LOONGARCH)
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SRCS_X +=
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OBJASM +=
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ifneq ($(findstring HAVE_BITDEPTH8 1, $(CONFIG)),)
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OBJASM += $(SRCASM_X:%.S=%-8.o)
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endif
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ifneq ($(findstring HAVE_BITDEPTH10 1, $(CONFIG)),)
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OBJASM += $(SRCASM_X:%.S=%-10.o)
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endif
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endif
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endif
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ifneq ($(HAVE_GETOPT_LONG),1)
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22
common/cpu.c
22
common/cpu.c
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@ -98,6 +98,9 @@ const x264_cpu_name_t x264_cpu_names[] =
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{"NEON", X264_CPU_NEON},
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#elif ARCH_MIPS
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{"MSA", X264_CPU_MSA},
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#elif ARCH_LOONGARCH
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{"LSX", X264_CPU_LSX},
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{"LASX", X264_CPU_LASX},
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#endif
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{"", 0},
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};
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@ -431,6 +434,25 @@ uint32_t x264_cpu_detect( void )
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return X264_CPU_MSA;
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}
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#elif HAVE_LSX
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#include <sys/auxv.h>
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#define LA_HWCAP_LSX ( 1U << 4 )
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#define LA_HWCAP_LASX ( 1U << 5 )
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uint32_t x264_cpu_detect( void )
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{
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uint32_t flags = 0;
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uint32_t hwcap = (uint32_t)getauxval( AT_HWCAP );
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if( hwcap & LA_HWCAP_LSX )
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flags |= X264_CPU_LSX;
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if( hwcap & LA_HWCAP_LASX )
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flags |= X264_CPU_LASX;
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return flags;
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}
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#else
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uint32_t x264_cpu_detect( void )
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@ -314,7 +314,7 @@ static inline int x264_is_regular_file( FILE *filehandle )
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#define EXPAND(x) x
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#if ARCH_X86 || ARCH_X86_64
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#if ARCH_X86 || ARCH_X86_64 || ARCH_LOONGARCH
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#define NATIVE_ALIGN 64
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#define ALIGNED_32( var ) DECLARE_ALIGNED( var, 32 )
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#define ALIGNED_64( var ) DECLARE_ALIGNED( var, 64 )
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@ -934,6 +934,9 @@ EOF
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ia64:Linux:*:*)
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echo ${UNAME_MACHINE}-unknown-linux-gnu
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exit ;;
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loongarch32:Linux:*:* | loongarch64:Linux:*:*)
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echo ${UNAME_MACHINE}-unknown-linux-gnu
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exit ;;
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m32r*:Linux:*:*)
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echo ${UNAME_MACHINE}-unknown-linux-gnu
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exit ;;
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@ -274,6 +274,7 @@ case $basic_machine in
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| ip2k | iq2000 \
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| le32 | le64 \
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| lm32 \
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| loongarch32 | loongarch64 \
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| m32c | m32r | m32rle | m68000 | m68k | m88k \
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| maxq | mb | microblaze | microblazeel | mcore | mep | metag \
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| mips | mipsbe | mipseb | mipsel | mipsle \
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@ -389,6 +390,7 @@ case $basic_machine in
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| ip2k-* | iq2000-* \
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| le32-* | le64-* \
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| lm32-* \
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| loongarch32-* | loongarch64-* \
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| m32c-* | m32r-* | m32rle-* \
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| m68000-* | m680[012346]0-* | m68360-* | m683?2-* | m68k-* \
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| m88110-* | m88k-* | maxq-* | mcore-* | metag-* \
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@ -411,7 +411,7 @@ NL="
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# list of all preprocessor HAVE values we can define
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CONFIG_HAVE="MALLOC_H ALTIVEC ALTIVEC_H MMX ARMV6 ARMV6T2 NEON AARCH64 BEOSTHREAD POSIXTHREAD WIN32THREAD THREAD LOG2F SWSCALE \
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LAVF FFMS GPAC AVS GPL VECTOREXT INTERLACED CPU_COUNT OPENCL THP LSMASH X86_INLINE_ASM AS_FUNC INTEL_DISPATCHER \
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MSA MMAP WINRT VSX ARM_INLINE_ASM STRTOK_R CLOCK_GETTIME BITDEPTH8 BITDEPTH10"
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MSA LSX MMAP WINRT VSX ARM_INLINE_ASM STRTOK_R CLOCK_GETTIME BITDEPTH8 BITDEPTH10"
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# parse options
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@ -822,6 +822,12 @@ case $host_cpu in
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AS="${AS-${CC}}"
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AS_EXT=".c"
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;;
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loongarch*)
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ARCH="LOONGARCH"
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ASFLAGS="$ASFLAGS -c"
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AS="${AS-${CC}}"
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AS_EXT=".S"
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;;
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aarch64|arm64*)
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ARCH="AARCH64"
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stack_alignment=16
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@ -1024,6 +1030,13 @@ if [ $asm = auto -a $ARCH = MIPS ] ; then
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fi
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fi
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if [ $asm = auto -a $ARCH = LOONGARCH ] ; then
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if cc_check '' '' '__asm__("xvadd.b $xr0, $xr1, $xr2");' ; then
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# Use HAVE_LSX as the base flag, compiler support LA SIMD(LSX and LASX)
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define HAVE_LSX
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fi
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fi
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[ $asm = no ] && AS=""
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[ "x$AS" = x ] && asm="no" || asm="yes"
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@ -1674,7 +1687,7 @@ cat conftest.log >> config.log
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cat conftest.log
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[ "$SRCPATH" != "." ] && ln -sf ${SRCPATH}/Makefile ./Makefile
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mkdir -p common/{aarch64,arm,mips,ppc,x86} encoder extras filters/video input output tools
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mkdir -p common/{aarch64,arm,mips,ppc,x86,loongarch} encoder extras filters/video input output tools
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echo
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echo "You can run 'make' or 'make fprofiled' now."
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@ -117,6 +117,9 @@ static inline uint32_t read_time(void)
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a = b;
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#elif ARCH_MIPS
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asm volatile( "rdhwr %0, $2" : "=r"(a) :: "memory" );
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#elif ARCH_LOONGARCH
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uint32_t id = 0;
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asm volatile( "rdtimel.w %0, %1" : "=r"(a), "=r"(id) :: "memory" );
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#endif
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return a;
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}
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@ -215,6 +218,9 @@ static void print_bench(void)
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b->cpu&X264_CPU_ARMV8 ? "armv8" :
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#elif ARCH_MIPS
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b->cpu&X264_CPU_MSA ? "msa" :
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#elif ARCH_LOONGARCH
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b->cpu&X264_CPU_LASX ? "lasx" :
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b->cpu&X264_CPU_LSX ? "lsx" :
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#endif
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"c",
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#if ARCH_X86 || ARCH_X86_64
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@ -2976,6 +2982,11 @@ static int check_all_flags( void )
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#elif ARCH_MIPS
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if( cpu_detect & X264_CPU_MSA )
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ret |= add_flags( &cpu0, &cpu1, X264_CPU_MSA, "MSA" );
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#elif ARCH_LOONGARCH
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if( cpu_detect & X264_CPU_LSX )
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ret |= add_flags( &cpu0, &cpu1, X264_CPU_LSX, "LSX" );
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if( cpu_detect & X264_CPU_LASX )
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ret |= add_flags( &cpu0, &cpu1, X264_CPU_LASX, "LASX" );
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#endif
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return ret;
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}
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@ -2989,7 +3000,7 @@ REALIGN_STACK int main( int argc, char **argv )
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if( argc > 1 && !strncmp( argv[1], "--bench", 7 ) )
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{
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#if !ARCH_X86 && !ARCH_X86_64 && !ARCH_PPC && !ARCH_ARM && !ARCH_AARCH64 && !ARCH_MIPS
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#if !ARCH_X86 && !ARCH_X86_64 && !ARCH_PPC && !ARCH_ARM && !ARCH_AARCH64 && !ARCH_MIPS && !ARCH_LOONGARCH
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fprintf( stderr, "no --bench for your cpu until you port rdtsc\n" );
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return 1;
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#endif
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4
x264.h
4
x264.h
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@ -181,6 +181,10 @@ typedef struct x264_nal_t
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/* MIPS */
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#define X264_CPU_MSA 0x0000001U /* MIPS MSA */
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/* LOONGARCH */
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#define X264_CPU_LSX 0x0000001U /* LOONGARCH LSX */
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#define X264_CPU_LASX 0x0000002U /* LOONGARCH LASX */
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/* Analyse flags */
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#define X264_ANALYSE_I4x4 0x0001U /* Analyse i4x4 */
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#define X264_ANALYSE_I8x8 0x0002U /* Analyse i8x8 (requires 8x8 transform) */
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