mirror of
https://code.videolan.org/videolan/vlc
synced 2024-09-28 23:09:59 +02:00
fef270581f
Re-license almost all the playback modules to LGPLv2.1+ with authorization from their respective contributors (230+) This includes: - access, codec, packetizers, demux - audio filters, audio mixers, audio output - video filters, video chroma, video output - text renderers - XML parser - ARM NEON and SSE2 optimisations (mostly for chromas and filters) Some modules are not concerned: - BDA and DShow access modules because Manol Manolov is AWOL - Real RTSP, because it is derived from Xine - x264 and t140 because they are encoders only - DLL Loader, because it is derived from MPlayer - DTS packetizer, because Jon Lech Johansen is AWOL - Shine and WMAfixed, because they are derived from Rockbox - Real demuxer, as it is derived from MPlayer and Wang Bo is AWOL - MPC demuxer, as Yavor Doganov is AWOL - Tivo demuxer, because it is derived from an MPlayer fork - Playlist demuxer, (WPL and ZPL parts missing), because suheaven is AWOL - iOS audio output and video display, because author refuses the license change - Equalizer and compressor, because Ronald Wright is AWOL - Mono, Headphone and Dolby, because author refuses the license change - hqdn3d and yadif, because they are from MPlayer/libavfilter - remoteosd, because it derives from RealVNC code - MMX optimisations, because Ollie Lho, from SiS, is AWOL - Rotate, because it depends on GPL motion Nota Bene: - Some modules depend on GPL-only libraries, a LGPL module does not mean that the resulting binary module will be LGPL. Libraries affected would include liba52, libdvdcss, libdvdnav, libdvdread, faad2, libdca, libmad, libmpeg2, libpostproc, SRC, sid, zvbi and probably others.
484 lines
25 KiB
C
484 lines
25 KiB
C
/*****************************************************************************
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* i420_yuy2.h : YUV to YUV conversion module for vlc
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*****************************************************************************
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* Copyright (C) 2000, 2001 VLC authors and VideoLAN
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* $Id$
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*
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* Authors: Samuel Hocevar <sam@zoy.org>
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* Damien Fouilleul <damien@videolan.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation; either version 2.1 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this program; if not, write to the Free Software Foundation,
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* Inc., 51 Franklin Street, Fifth Floor, Boston MA 02110-1301, USA.
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*****************************************************************************/
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#ifdef MODULE_NAME_IS_i420_yuy2_mmx
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#if defined(CAN_COMPILE_MMX)
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/* MMX assembly */
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#define MMX_CALL(MMX_INSTRUCTIONS) \
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do { \
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__asm__ __volatile__( \
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".p2align 3 \n\t \
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movd (%0), %%mm1 # Load 4 Cb 00 00 00 00 u3 u2 u1 u0 \n\
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movd (%1), %%mm2 # Load 4 Cr 00 00 00 00 v3 v2 v1 v0 \n\
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movq (%2), %%mm0 # Load 8 Y y7 y6 y5 y4 y3 y2 y1 y0 \n\
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movq (%3), %%mm3 # Load 8 Y Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 \n\
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" \
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: \
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: "r" (p_u), "r" (p_v), \
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"r" (p_y1), "r" (p_y2) \
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: "mm0", "mm1", "mm2", "mm3"); \
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__asm__ __volatile__( \
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".p2align 3 \n\t" \
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MMX_INSTRUCTIONS \
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: \
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: "r" (p_line1), "r" (p_line2) \
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: "mm0", "mm1", "mm2", "mm3"); \
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p_line1 += 16; p_line2 += 16; \
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p_y1 += 8; p_y2 += 8; \
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p_u += 4; p_v += 4; \
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} while(0)
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#define MMX_END __asm__ __volatile__ ( "emms" )
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#define MMX_YUV420_YUYV " \n\
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punpcklbw %%mm2, %%mm1 # v3 u3 v2 u2 v1 u1 v0 u0 \n\
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movq %%mm0, %%mm2 # y7 y6 y5 y4 y3 y2 y1 y0 \n\
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punpcklbw %%mm1, %%mm2 # v1 y3 u1 y2 v0 y1 u0 y0 \n\
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movq %%mm2, (%0) # Store low YUYV \n\
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punpckhbw %%mm1, %%mm0 # v3 y7 u3 y6 v2 y5 u2 y4 \n\
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movq %%mm0, 8(%0) # Store high YUYV \n\
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movq %%mm3, %%mm4 # Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 \n\
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punpcklbw %%mm1, %%mm4 # v1 Y3 u1 Y2 v0 Y1 u0 Y0 \n\
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movq %%mm4, (%1) # Store low YUYV \n\
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punpckhbw %%mm1, %%mm3 # v3 Y7 u3 Y6 v2 Y5 u2 Y4 \n\
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movq %%mm3, 8(%1) # Store high YUYV \n\
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"
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#define MMX_YUV420_YVYU " \n\
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punpcklbw %%mm1, %%mm2 # u3 v3 u2 v2 u1 v1 u0 v0 \n\
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movq %%mm0, %%mm1 # y7 y6 y5 y4 y3 y2 y1 y0 \n\
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punpcklbw %%mm2, %%mm1 # u1 y3 v1 y2 u0 y1 v0 y0 \n\
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movq %%mm1, (%0) # Store low YUYV \n\
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punpckhbw %%mm2, %%mm0 # u3 y7 v3 y6 u2 y5 v2 y4 \n\
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movq %%mm0, 8(%0) # Store high YUYV \n\
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movq %%mm3, %%mm4 # Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 \n\
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punpcklbw %%mm2, %%mm4 # u1 Y3 v1 Y2 u0 Y1 v0 Y0 \n\
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movq %%mm4, (%1) # Store low YUYV \n\
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punpckhbw %%mm2, %%mm3 # u3 Y7 v3 Y6 u2 Y5 v2 Y4 \n\
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movq %%mm3, 8(%1) # Store high YUYV \n\
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"
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#define MMX_YUV420_UYVY " \n\
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punpcklbw %%mm2, %%mm1 # v3 u3 v2 u2 v1 u1 v0 u0 \n\
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movq %%mm1, %%mm2 # v3 u3 v2 u2 v1 u1 v0 u0 \n\
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punpcklbw %%mm0, %%mm2 # y3 v1 y2 u1 y1 v0 y0 u0 \n\
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movq %%mm2, (%0) # Store low UYVY \n\
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movq %%mm1, %%mm2 # u3 v3 u2 v2 u1 v1 u0 v0 \n\
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punpckhbw %%mm0, %%mm2 # y3 v1 y2 u1 y1 v0 y0 u0 \n\
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movq %%mm2, 8(%0) # Store high UYVY \n\
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movq %%mm1, %%mm4 # u3 v3 u2 v2 u1 v1 u0 v0 \n\
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punpcklbw %%mm3, %%mm4 # Y3 v1 Y2 u1 Y1 v0 Y0 u0 \n\
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movq %%mm4, (%1) # Store low UYVY \n\
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punpckhbw %%mm3, %%mm1 # Y7 v3 Y6 u3 Y5 v2 Y4 u2 \n\
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movq %%mm1, 8(%1) # Store high UYVY \n\
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"
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/* FIXME: this code does not work ! Chroma seems to be wrong. */
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#define MMX_YUV420_Y211 " \n\
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movd (%4), %%mm2 # Load 4 Cb 00 00 00 00 u3 u2 u1 u0 \n\
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movd (%5), %%mm3 # Load 4 Cr 00 00 00 00 v3 v2 v1 v0 \n\
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pand i_00ffw, %%mm0 # get Y even 00 Y6 00 Y4 00 Y2 00 Y0 \n\
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packuswb %%mm0, %%mm0 # pack Y y6 y4 y2 y0 y6 y4 y2 y0 \n\
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pand i_00ffw, %%mm2 # get U even 00 u6 00 u4 00 u2 00 u0 \n\
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packuswb %%mm2, %%mm2 # pack U 00 00 u2 u0 00 00 u2 u0 \n\
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pand i_00ffw, %%mm3 # get V even 00 v6 00 v4 00 v2 00 v0 \n\
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packuswb %%mm3, %%mm3 # pack V 00 00 v2 v0 00 00 v2 v0 \n\
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punpcklbw %%mm3, %%mm2 # 00 00 00 00 v2 u2 v0 u0 \n\
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psubsw i_80w, %%mm2 # U,V -= 128 \n\
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punpcklbw %%mm2, %%mm0 # v2 y6 u2 y4 v0 y2 u0 y0 \n\
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movq %%mm0, (%0) # Store YUYV \n\
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pand i_00ffw, %%mm1 # get Y even 00 Y6 00 Y4 00 Y2 00 Y0 \n\
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packuswb %%mm1, %%mm1 # pack Y Y6 Y4 Y2 Y0 Y6 Y4 Y2 Y0 \n\
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punpcklbw %%mm2, %%mm1 # v2 Y6 u2 Y4 v0 Y2 u0 Y0 \n\
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movq %%mm1, (%1) # Store YUYV \n\
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"
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#elif defined(HAVE_MMX_INTRINSICS)
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/* MMX intrinsics */
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#include <mmintrin.h>
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#define MMX_CALL(MMX_INSTRUCTIONS) \
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do { \
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__m64 mm0, mm1, mm2, mm3, mm4; \
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MMX_INSTRUCTIONS \
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p_line1 += 16; p_line2 += 16; \
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p_y1 += 8; p_y2 += 8; \
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p_u += 4; p_v += 4; \
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} while(0)
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#define MMX_END _mm_empty()
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#define MMX_YUV420_YUYV \
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mm1 = _mm_cvtsi32_si64(*(int*)p_u); \
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mm2 = _mm_cvtsi32_si64(*(int*)p_v); \
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mm0 = (__m64)*(uint64_t*)p_y1; \
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mm3 = (__m64)*(uint64_t*)p_y2; \
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mm1 = _mm_unpacklo_pi8(mm1, mm2); \
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mm2 = mm0; \
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mm2 = _mm_unpacklo_pi8(mm2, mm1); \
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*(uint64_t*)p_line1 = (uint64_t)mm2; \
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mm0 = _mm_unpackhi_pi8(mm0, mm1); \
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*(uint64_t*)(p_line1+8) = (uint64_t)mm0;\
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mm4 = mm3; \
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mm4 = _mm_unpacklo_pi8(mm4, mm1); \
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*(uint64_t*)p_line2 = (uint64_t)mm4; \
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mm3 = _mm_unpackhi_pi8(mm3, mm1); \
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*(uint64_t*)(p_line2+8) = (uint64_t)mm3;
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#define MMX_YUV420_YVYU \
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mm2 = _mm_cvtsi32_si64(*(int*)p_u); \
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mm1 = _mm_cvtsi32_si64(*(int*)p_v); \
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mm0 = (__m64)*(uint64_t*)p_y1; \
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mm3 = (__m64)*(uint64_t*)p_y2; \
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mm1 = _mm_unpacklo_pi8(mm1, mm2); \
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mm2 = mm0; \
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mm2 = _mm_unpacklo_pi8(mm2, mm1); \
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*(uint64_t*)p_line1 = (uint64_t)mm2; \
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mm0 = _mm_unpackhi_pi8(mm0, mm1); \
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*(uint64_t*)(p_line1+8) = (uint64_t)mm0;\
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mm4 = mm3; \
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mm4 = _mm_unpacklo_pi8(mm4, mm1); \
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*(uint64_t*)p_line2 = (uint64_t)mm4; \
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mm3 = _mm_unpackhi_pi8(mm3, mm1); \
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*(uint64_t*)(p_line2+8) = (uint64_t)mm3;
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#define MMX_YUV420_UYVY \
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mm1 = _mm_cvtsi32_si64(*(int*)p_u); \
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mm2 = _mm_cvtsi32_si64(*(int*)p_v); \
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mm0 = (__m64)*(uint64_t*)p_y1; \
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mm3 = (__m64)*(uint64_t*)p_y2; \
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mm1 = _mm_unpacklo_pi8(mm1, mm2); \
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mm2 = mm1; \
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mm2 = _mm_unpacklo_pi8(mm2, mm0); \
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*(uint64_t*)p_line1 = (uint64_t)mm2; \
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mm2 = mm1; \
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mm2 = _mm_unpackhi_pi8(mm2, mm0); \
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*(uint64_t*)(p_line1+8) = (uint64_t)mm2;\
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mm4 = mm1; \
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mm4 = _mm_unpacklo_pi8(mm4, mm3); \
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*(uint64_t*)p_line2 = (uint64_t)mm4; \
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mm1 = _mm_unpackhi_pi8(mm1, mm3); \
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*(uint64_t*)(p_line2+8) = (uint64_t)mm1;
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#endif
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#elif defined( MODULE_NAME_IS_i420_yuy2_sse2 )
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#if defined(CAN_COMPILE_SSE2)
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/* SSE2 assembly */
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#define SSE2_CALL(SSE2_INSTRUCTIONS) \
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do { \
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__asm__ __volatile__( \
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".p2align 3 \n\t \
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movq (%0), %%xmm1 # Load 8 Cb u7 u6 u5 u4 u3 u2 u1 u0 \n\
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movq (%1), %%xmm2 # Load 8 Cr v7 06 v5 v4 v3 v2 v1 v0 \n\
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" \
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: \
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: "r" (p_u), "r" (p_v) \
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: "xmm1", "xmm2"); \
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__asm__ __volatile__( \
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".p2align 3 \n\t" \
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SSE2_INSTRUCTIONS \
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: \
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: "r" (p_line1), "r" (p_line2), \
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"r" (p_y1), "r" (p_y2) \
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: "xmm0", "xmm1", "xmm2", "xmm3", "xmm4"); \
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p_line1 += 32; p_line2 += 32; \
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p_y1 += 16; p_y2 += 16; \
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p_u += 8; p_v += 8; \
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} while(0)
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#define SSE2_END __asm__ __volatile__ ( "sfence" ::: "memory" )
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#define SSE2_YUV420_YUYV_ALIGNED " \n\
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movdqa (%2), %%xmm0 # Load 16 Y y15 y14 y13 .. y2 y1 y0 \n\
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movdqa (%3), %%xmm3 # Load 16 Y Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 \n\
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punpcklbw %%xmm2, %%xmm1 # v7 u7 v6 u6 .. u1 v0 u0 \n\
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movdqa %%xmm0, %%xmm2 # y15 y14 y13 .. y2 y1 y0 \n\
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punpcklbw %%xmm1, %%xmm2 # v3 y7 u3 .. v0 y1 u0 y0 \n\
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movntdq %%xmm2, (%0) # Store low YUYV \n\
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punpckhbw %%xmm1, %%xmm0 # v3 y7 u3 y6 v2 y5 u2 y4 \n\
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movntdq %%xmm0, 16(%0) # Store high YUYV \n\
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movdqa %%xmm3, %%xmm4 # Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 \n\
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punpcklbw %%xmm1, %%xmm4 # v1 Y3 u1 Y2 v0 Y1 u0 Y0 \n\
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movntdq %%xmm4, (%1) # Store low YUYV \n\
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punpckhbw %%xmm1, %%xmm3 # v3 Y7 u3 Y6 v2 Y5 u2 Y4 \n\
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movntdq %%xmm3, 16(%1) # Store high YUYV \n\
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"
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#define SSE2_YUV420_YUYV_UNALIGNED " \n\
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movdqu (%2), %%xmm0 # Load 16 Y y7 y6 y5 y4 y3 y2 y1 y0 \n\
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movdqu (%3), %%xmm3 # Load 16 Y Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 \n\
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prefetchnta (%0) # Tell CPU not to cache output YUYV data \n\
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prefetchnta (%1) # Tell CPU not to cache output YUYV data \n\
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punpcklbw %%xmm2, %%xmm1 # v3 u3 v2 u2 v1 u1 v0 u0 \n\
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movdqa %%xmm0, %%xmm2 # y7 y6 y5 y4 y3 y2 y1 y0 \n\
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punpcklbw %%xmm1, %%xmm2 # v1 y3 u1 y2 v0 y1 u0 y0 \n\
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movdqu %%xmm2, (%0) # Store low YUYV \n\
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punpckhbw %%xmm1, %%xmm0 # v3 y7 u3 y6 v2 y5 u2 y4 \n\
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movdqu %%xmm0, 16(%0) # Store high YUYV \n\
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movdqa %%xmm3, %%xmm4 # Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 \n\
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punpcklbw %%xmm1, %%xmm4 # v1 Y3 u1 Y2 v0 Y1 u0 Y0 \n\
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movdqu %%xmm4, (%1) # Store low YUYV \n\
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punpckhbw %%xmm1, %%xmm3 # v3 Y7 u3 Y6 v2 Y5 u2 Y4 \n\
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movdqu %%xmm3, 16(%1) # Store high YUYV \n\
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"
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#define SSE2_YUV420_YVYU_ALIGNED " \n\
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movdqa (%2), %%xmm0 # Load 16 Y y7 y6 y5 y4 y3 y2 y1 y0 \n\
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movdqa (%3), %%xmm3 # Load 16 Y Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 \n\
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punpcklbw %%xmm1, %%xmm2 # u3 v3 u2 v2 u1 v1 u0 v0 \n\
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movdqa %%xmm0, %%xmm1 # y7 y6 y5 y4 y3 y2 y1 y0 \n\
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punpcklbw %%xmm2, %%xmm1 # u1 y3 v1 y2 u0 y1 v0 y0 \n\
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movntdq %%xmm1, (%0) # Store low YUYV \n\
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punpckhbw %%xmm2, %%xmm0 # u3 y7 v3 y6 u2 y5 v2 y4 \n\
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movntdq %%xmm0, 16(%0) # Store high YUYV \n\
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movdqa %%xmm3, %%xmm4 # Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 \n\
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punpcklbw %%xmm2, %%xmm4 # u1 Y3 v1 Y2 u0 Y1 v0 Y0 \n\
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movntdq %%xmm4, (%1) # Store low YUYV \n\
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punpckhbw %%xmm2, %%xmm3 # u3 Y7 v3 Y6 u2 Y5 v2 Y4 \n\
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movntdq %%xmm3, 16(%1) # Store high YUYV \n\
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"
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#define SSE2_YUV420_YVYU_UNALIGNED " \n\
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movdqu (%2), %%xmm0 # Load 16 Y y7 y6 y5 y4 y3 y2 y1 y0 \n\
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movdqu (%3), %%xmm3 # Load 16 Y Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 \n\
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prefetchnta (%0) # Tell CPU not to cache output YVYU data \n\
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prefetchnta (%1) # Tell CPU not to cache output YVYU data \n\
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punpcklbw %%xmm1, %%xmm2 # u3 v3 u2 v2 u1 v1 u0 v0 \n\
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movdqu %%xmm0, %%xmm1 # y7 y6 y5 y4 y3 y2 y1 y0 \n\
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punpcklbw %%xmm2, %%xmm1 # u1 y3 v1 y2 u0 y1 v0 y0 \n\
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movdqu %%xmm1, (%0) # Store low YUYV \n\
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punpckhbw %%xmm2, %%xmm0 # u3 y7 v3 y6 u2 y5 v2 y4 \n\
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movdqu %%xmm0, 16(%0) # Store high YUYV \n\
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movdqu %%xmm3, %%xmm4 # Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 \n\
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punpcklbw %%xmm2, %%xmm4 # u1 Y3 v1 Y2 u0 Y1 v0 Y0 \n\
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movdqu %%xmm4, (%1) # Store low YUYV \n\
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punpckhbw %%xmm2, %%xmm3 # u3 Y7 v3 Y6 u2 Y5 v2 Y4 \n\
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movdqu %%xmm3, 16(%1) # Store high YUYV \n\
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"
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#define SSE2_YUV420_UYVY_ALIGNED " \n\
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movdqa (%2), %%xmm0 # Load 16 Y y7 y6 y5 y4 y3 y2 y1 y0 \n\
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movdqa (%3), %%xmm3 # Load 16 Y Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 \n\
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punpcklbw %%xmm2, %%xmm1 # v3 u3 v2 u2 v1 u1 v0 u0 \n\
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movdqa %%xmm1, %%xmm2 # v3 u3 v2 u2 v1 u1 v0 u0 \n\
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punpcklbw %%xmm0, %%xmm2 # y3 v1 y2 u1 y1 v0 y0 u0 \n\
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movntdq %%xmm2, (%0) # Store low UYVY \n\
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movdqa %%xmm1, %%xmm2 # u3 v3 u2 v2 u1 v1 u0 v0 \n\
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punpckhbw %%xmm0, %%xmm2 # y3 v1 y2 u1 y1 v0 y0 u0 \n\
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movntdq %%xmm2, 16(%0) # Store high UYVY \n\
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movdqa %%xmm1, %%xmm4 # u3 v3 u2 v2 u1 v1 u0 v0 \n\
|
|
punpcklbw %%xmm3, %%xmm4 # Y3 v1 Y2 u1 Y1 v0 Y0 u0 \n\
|
|
movntdq %%xmm4, (%1) # Store low UYVY \n\
|
|
punpckhbw %%xmm3, %%xmm1 # Y7 v3 Y6 u3 Y5 v2 Y4 u2 \n\
|
|
movntdq %%xmm1, 16(%1) # Store high UYVY \n\
|
|
"
|
|
|
|
#define SSE2_YUV420_UYVY_UNALIGNED " \n\
|
|
movdqu (%2), %%xmm0 # Load 16 Y y7 y6 y5 y4 y3 y2 y1 y0 \n\
|
|
movdqu (%3), %%xmm3 # Load 16 Y Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 \n\
|
|
prefetchnta (%0) # Tell CPU not to cache output UYVY data \n\
|
|
prefetchnta (%1) # Tell CPU not to cache output UYVY data \n\
|
|
punpcklbw %%xmm2, %%xmm1 # v3 u3 v2 u2 v1 u1 v0 u0 \n\
|
|
movdqu %%xmm1, %%xmm2 # v3 u3 v2 u2 v1 u1 v0 u0 \n\
|
|
punpcklbw %%xmm0, %%xmm2 # y3 v1 y2 u1 y1 v0 y0 u0 \n\
|
|
movdqu %%xmm2, (%0) # Store low UYVY \n\
|
|
movdqu %%xmm1, %%xmm2 # u3 v3 u2 v2 u1 v1 u0 v0 \n\
|
|
punpckhbw %%xmm0, %%xmm2 # y3 v1 y2 u1 y1 v0 y0 u0 \n\
|
|
movdqu %%xmm2, 16(%0) # Store high UYVY \n\
|
|
movdqu %%xmm1, %%xmm4 # u3 v3 u2 v2 u1 v1 u0 v0 \n\
|
|
punpcklbw %%xmm3, %%xmm4 # Y3 v1 Y2 u1 Y1 v0 Y0 u0 \n\
|
|
movdqu %%xmm4, (%1) # Store low UYVY \n\
|
|
punpckhbw %%xmm3, %%xmm1 # Y7 v3 Y6 u3 Y5 v2 Y4 u2 \n\
|
|
movdqu %%xmm1, 16(%1) # Store high UYVY \n\
|
|
"
|
|
|
|
#elif defined(HAVE_SSE2_INTRINSICS)
|
|
|
|
/* SSE2 intrinsics */
|
|
|
|
#include <emmintrin.h>
|
|
|
|
#define SSE2_CALL(SSE2_INSTRUCTIONS) \
|
|
do { \
|
|
__m128i xmm0, xmm1, xmm2, xmm3, xmm4; \
|
|
SSE2_INSTRUCTIONS \
|
|
p_line1 += 32; p_line2 += 32; \
|
|
p_y1 += 16; p_y2 += 16; \
|
|
p_u += 8; p_v += 8; \
|
|
} while(0)
|
|
|
|
#define SSE2_END _mm_sfence()
|
|
|
|
#define SSE2_YUV420_YUYV_ALIGNED \
|
|
xmm1 = _mm_loadl_epi64((__m128i *)p_u); \
|
|
xmm2 = _mm_loadl_epi64((__m128i *)p_v); \
|
|
xmm0 = _mm_load_si128((__m128i *)p_y1); \
|
|
xmm3 = _mm_load_si128((__m128i *)p_y2); \
|
|
xmm1 = _mm_unpacklo_epi8(xmm1, xmm2); \
|
|
xmm2 = xmm0; \
|
|
xmm2 = _mm_unpacklo_epi8(xmm2, xmm1); \
|
|
_mm_stream_si128((__m128i*)(p_line1), xmm2); \
|
|
xmm0 = _mm_unpackhi_epi8(xmm0, xmm1); \
|
|
_mm_stream_si128((__m128i*)(p_line1+16), xmm0); \
|
|
xmm4 = xmm3; \
|
|
xmm4 = _mm_unpacklo_epi8(xmm4, xmm1); \
|
|
_mm_stream_si128((__m128i*)(p_line2), xmm4); \
|
|
xmm3 = _mm_unpackhi_epi8(xmm3, xmm1); \
|
|
_mm_stream_si128((__m128i*)(p_line1+16), xmm3);
|
|
|
|
#define SSE2_YUV420_YUYV_UNALIGNED \
|
|
xmm1 = _mm_loadl_epi64((__m128i *)p_u); \
|
|
xmm2 = _mm_loadl_epi64((__m128i *)p_v); \
|
|
xmm0 = _mm_loadu_si128((__m128i *)p_y1); \
|
|
xmm3 = _mm_loadu_si128((__m128i *)p_y2); \
|
|
_mm_prefetch(p_line1, _MM_HINT_NTA); \
|
|
_mm_prefetch(p_line2, _MM_HINT_NTA); \
|
|
xmm1 = _mm_unpacklo_epi8(xmm1, xmm2); \
|
|
xmm2 = xmm0; \
|
|
xmm2 = _mm_unpacklo_epi8(xmm2, xmm1); \
|
|
_mm_storeu_si128((__m128i*)(p_line1), xmm2); \
|
|
xmm0 = _mm_unpackhi_epi8(xmm0, xmm1); \
|
|
_mm_storeu_si128((__m128i*)(p_line1+16), xmm0); \
|
|
xmm4 = xmm3; \
|
|
xmm4 = _mm_unpacklo_epi8(xmm4, xmm1); \
|
|
_mm_storeu_si128((__m128i*)(p_line2), xmm4); \
|
|
xmm3 = _mm_unpackhi_epi8(xmm3, xmm1); \
|
|
_mm_storeu_si128((__m128i*)(p_line1+16), xmm3);
|
|
|
|
#define SSE2_YUV420_YVYU_ALIGNED \
|
|
xmm1 = _mm_loadl_epi64((__m128i *)p_v); \
|
|
xmm2 = _mm_loadl_epi64((__m128i *)p_u); \
|
|
xmm0 = _mm_load_si128((__m128i *)p_y1); \
|
|
xmm3 = _mm_load_si128((__m128i *)p_y2); \
|
|
xmm1 = _mm_unpacklo_epi8(xmm1, xmm2); \
|
|
xmm2 = xmm0; \
|
|
xmm2 = _mm_unpacklo_epi8(xmm2, xmm1); \
|
|
_mm_stream_si128((__m128i*)(p_line1), xmm2); \
|
|
xmm0 = _mm_unpackhi_epi8(xmm0, xmm1); \
|
|
_mm_stream_si128((__m128i*)(p_line1+16), xmm0); \
|
|
xmm4 = xmm3; \
|
|
xmm4 = _mm_unpacklo_epi8(xmm4, xmm1); \
|
|
_mm_stream_si128((__m128i*)(p_line2), xmm4); \
|
|
xmm3 = _mm_unpackhi_epi8(xmm3, xmm1); \
|
|
_mm_stream_si128((__m128i*)(p_line1+16), xmm3);
|
|
|
|
#define SSE2_YUV420_YVYU_UNALIGNED \
|
|
xmm1 = _mm_loadl_epi64((__m128i *)p_v); \
|
|
xmm2 = _mm_loadl_epi64((__m128i *)p_u); \
|
|
xmm0 = _mm_loadu_si128((__m128i *)p_y1); \
|
|
xmm3 = _mm_loadu_si128((__m128i *)p_y2); \
|
|
_mm_prefetch(p_line1, _MM_HINT_NTA); \
|
|
_mm_prefetch(p_line2, _MM_HINT_NTA); \
|
|
xmm1 = _mm_unpacklo_epi8(xmm1, xmm2); \
|
|
xmm2 = xmm0; \
|
|
xmm2 = _mm_unpacklo_epi8(xmm2, xmm1); \
|
|
_mm_storeu_si128((__m128i*)(p_line1), xmm2); \
|
|
xmm0 = _mm_unpackhi_epi8(xmm0, xmm1); \
|
|
_mm_storeu_si128((__m128i*)(p_line1+16), xmm0); \
|
|
xmm4 = xmm3; \
|
|
xmm4 = _mm_unpacklo_epi8(xmm4, xmm1); \
|
|
_mm_storeu_si128((__m128i*)(p_line2), xmm4); \
|
|
xmm3 = _mm_unpackhi_epi8(xmm3, xmm1); \
|
|
_mm_storeu_si128((__m128i*)(p_line1+16), xmm3);
|
|
|
|
#define SSE2_YUV420_UYVY_ALIGNED \
|
|
xmm1 = _mm_loadl_epi64((__m128i *)p_u); \
|
|
xmm2 = _mm_loadl_epi64((__m128i *)p_v); \
|
|
xmm0 = _mm_load_si128((__m128i *)p_y1); \
|
|
xmm3 = _mm_load_si128((__m128i *)p_y2); \
|
|
xmm1 = _mm_unpacklo_epi8(xmm1, xmm2); \
|
|
xmm2 = xmm1; \
|
|
xmm2 = _mm_unpacklo_epi8(xmm2, xmm0); \
|
|
_mm_stream_si128((__m128i*)(p_line1), xmm2); \
|
|
xmm2 = xmm1; \
|
|
xmm2 = _mm_unpackhi_epi8(xmm2, xmm0); \
|
|
_mm_stream_si128((__m128i*)(p_line1+16), xmm2); \
|
|
xmm4 = xmm1; \
|
|
xmm4 = _mm_unpacklo_epi8(xmm4, xmm3); \
|
|
_mm_stream_si128((__m128i*)(p_line2), xmm4); \
|
|
xmm1 = _mm_unpackhi_epi8(xmm1, xmm3); \
|
|
_mm_stream_si128((__m128i*)(p_line1+16), xmm1);
|
|
|
|
#define SSE2_YUV420_UYVY_UNALIGNED \
|
|
xmm1 = _mm_loadl_epi64((__m128i *)p_u); \
|
|
xmm2 = _mm_loadl_epi64((__m128i *)p_v); \
|
|
xmm0 = _mm_loadu_si128((__m128i *)p_y1); \
|
|
xmm3 = _mm_loadu_si128((__m128i *)p_y2); \
|
|
_mm_prefetch(p_line1, _MM_HINT_NTA); \
|
|
_mm_prefetch(p_line2, _MM_HINT_NTA); \
|
|
xmm1 = _mm_unpacklo_epi8(xmm1, xmm2); \
|
|
xmm2 = xmm1; \
|
|
xmm2 = _mm_unpacklo_epi8(xmm2, xmm0); \
|
|
_mm_storeu_si128((__m128i*)(p_line1), xmm2); \
|
|
xmm2 = xmm1; \
|
|
xmm2 = _mm_unpackhi_epi8(xmm2, xmm0); \
|
|
_mm_storeu_si128((__m128i*)(p_line1+16), xmm2); \
|
|
xmm4 = xmm1; \
|
|
xmm4 = _mm_unpacklo_epi8(xmm4, xmm3); \
|
|
_mm_storeu_si128((__m128i*)(p_line2), xmm4); \
|
|
xmm1 = _mm_unpackhi_epi8(xmm1, xmm3); \
|
|
_mm_storeu_si128((__m128i*)(p_line1+16), xmm1);
|
|
|
|
#endif
|
|
|
|
#endif
|
|
|
|
/* Used in both accelerated and C modules */
|
|
|
|
#define C_YUV420_YVYU( ) \
|
|
*(p_line1)++ = *(p_y1)++; *(p_line2)++ = *(p_y2)++; \
|
|
*(p_line1)++ = *(p_line2)++ = *(p_v)++; \
|
|
*(p_line1)++ = *(p_y1)++; *(p_line2)++ = *(p_y2)++; \
|
|
*(p_line1)++ = *(p_line2)++ = *(p_u)++; \
|
|
|
|
#define C_YUV420_Y211( ) \
|
|
*(p_line1)++ = *(p_y1); p_y1 += 2; \
|
|
*(p_line2)++ = *(p_y2); p_y2 += 2; \
|
|
*(p_line1)++ = *(p_line2)++ = *(p_u) - 0x80; p_u += 2; \
|
|
*(p_line1)++ = *(p_y1); p_y1 += 2; \
|
|
*(p_line2)++ = *(p_y2); p_y2 += 2; \
|
|
*(p_line1)++ = *(p_line2)++ = *(p_v) - 0x80; p_v += 2; \
|
|
|
|
|
|
#define C_YUV420_YUYV( ) \
|
|
*(p_line1)++ = *(p_y1)++; *(p_line2)++ = *(p_y2)++; \
|
|
*(p_line1)++ = *(p_line2)++ = *(p_u)++; \
|
|
*(p_line1)++ = *(p_y1)++; *(p_line2)++ = *(p_y2)++; \
|
|
*(p_line1)++ = *(p_line2)++ = *(p_v)++; \
|
|
|
|
#define C_YUV420_UYVY( ) \
|
|
*(p_line1)++ = *(p_line2)++ = *(p_u)++; \
|
|
*(p_line1)++ = *(p_y1)++; *(p_line2)++ = *(p_y2)++; \
|
|
*(p_line1)++ = *(p_line2)++ = *(p_v)++; \
|
|
*(p_line1)++ = *(p_y1)++; *(p_line2)++ = *(p_y2)++; \
|
|
|