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![Michael Niedermayer](/assets/img/avatar_default.png)
These are all part of splited out dsp utils from FFmpeg Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
613 lines
17 KiB
NASM
613 lines
17 KiB
NASM
;******************************************************************************
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;* Core video DSP functions
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;* Copyright (c) 2012 Ronald S. Bultje <rsbultje@gmail.com>
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;*
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;* This file is part of FFmpeg.
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;*
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;* FFmpeg is free software; you can redistribute it and/or
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;* modify it under the terms of the GNU Lesser General Public
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;* License as published by the Free Software Foundation; either
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;* version 2.1 of the License, or (at your option) any later version.
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;*
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;* FFmpeg is distributed in the hope that it will be useful,
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;* but WITHOUT ANY WARRANTY; without even the implied warranty of
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;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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;* Lesser General Public License for more details.
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;*
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;* You should have received a copy of the GNU Lesser General Public
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;* License along with FFmpeg; if not, write to the Free Software
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;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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;******************************************************************************
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%include "libavutil/x86/x86util.asm"
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SECTION .text
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; extern void ff_emu_edge_core(uint8_t *buf, const uint8_t *src, x86_reg linesize,
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; x86_reg start_y, x86_reg end_y, x86_reg block_h,
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; x86_reg start_x, x86_reg end_x, x86_reg block_w);
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;
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; The actual function itself is below. It basically wraps a very simple
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; w = end_x - start_x
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; if (w) {
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; if (w > 22) {
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; jump to the slow loop functions
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; } else {
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; jump to the fast loop functions
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; }
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; }
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;
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; ... and then the same for left/right extend also. See below for loop
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; function implementations. Fast are fixed-width, slow is variable-width
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%macro EMU_EDGE_FUNC 0
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%if ARCH_X86_64
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%define w_reg r7
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cglobal emu_edge_core, 6, 9, 1
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mov r8, r5 ; save block_h
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%else
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%define w_reg r6
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cglobal emu_edge_core, 2, 7, 0
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mov r4, r4m ; end_y
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mov r5, r5m ; block_h
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%endif
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; start with vertical extend (top/bottom) and body pixel copy
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mov w_reg, r7m
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sub w_reg, r6m ; w = start_x - end_x
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sub r5, r4
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%if ARCH_X86_64
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sub r4, r3
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%else
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sub r4, dword r3m
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%endif
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cmp w_reg, 22
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jg .slow_v_extend_loop
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%if ARCH_X86_32
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mov r2, r2m ; linesize
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%endif
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sal w_reg, 7 ; w * 128
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%ifdef PIC
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lea rax, [.emuedge_v_extend_1 - (.emuedge_v_extend_2 - .emuedge_v_extend_1)]
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add w_reg, rax
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%else
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lea w_reg, [.emuedge_v_extend_1 - (.emuedge_v_extend_2 - .emuedge_v_extend_1)+w_reg]
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%endif
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call w_reg ; fast top extend, body copy and bottom extend
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.v_extend_end:
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; horizontal extend (left/right)
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mov w_reg, r6m ; start_x
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sub r0, w_reg
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%if ARCH_X86_64
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mov r3, r0 ; backup of buf+block_h*linesize
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mov r5, r8
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%else
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mov r0m, r0 ; backup of buf+block_h*linesize
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mov r5, r5m
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%endif
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test w_reg, w_reg
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jz .right_extend
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cmp w_reg, 22
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jg .slow_left_extend_loop
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mov r1, w_reg
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dec w_reg
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; FIXME we can do a if size == 1 here if that makes any speed difference, test me
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sar w_reg, 1
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sal w_reg, 6
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; r0=buf+block_h*linesize,r7(64)/r6(32)=start_x offset for funcs
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; r6(rax)/r3(ebx)=val,r2=linesize,r1=start_x,r5=block_h
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%ifdef PIC
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lea rax, [.emuedge_extend_left_2]
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add w_reg, rax
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%else
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lea w_reg, [.emuedge_extend_left_2+w_reg]
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%endif
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call w_reg
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; now r3(64)/r0(32)=buf,r2=linesize,r8/r5=block_h,r6/r3=val, r7/r6=end_x, r1=block_w
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.right_extend:
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%if ARCH_X86_32
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mov r0, r0m
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mov r5, r5m
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%endif
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mov w_reg, r7m ; end_x
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mov r1, r8m ; block_w
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mov r4, r1
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sub r1, w_reg
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jz .h_extend_end ; if (end_x == block_w) goto h_extend_end
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cmp r1, 22
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jg .slow_right_extend_loop
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dec r1
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; FIXME we can do a if size == 1 here if that makes any speed difference, test me
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sar r1, 1
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sal r1, 6
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%ifdef PIC
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lea rax, [.emuedge_extend_right_2]
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add r1, rax
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%else
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lea r1, [.emuedge_extend_right_2+r1]
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%endif
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call r1
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.h_extend_end:
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RET
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%if ARCH_X86_64
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%define vall al
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%define valh ah
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%define valw ax
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%define valw2 r7w
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%define valw3 r3w
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%if WIN64
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%define valw4 r7w
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%else ; unix64
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%define valw4 r3w
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%endif
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%define vald eax
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%else
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%define vall bl
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%define valh bh
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%define valw bx
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%define valw2 r6w
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%define valw3 valw2
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%define valw4 valw3
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%define vald ebx
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%define stack_offset 0x14
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%endif
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%endmacro
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; macro to read/write a horizontal number of pixels (%2) to/from registers
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; on x86-64, - fills xmm0-15 for consecutive sets of 16 pixels
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; - if (%2 & 15 == 8) fills the last 8 bytes into rax
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; - else if (%2 & 8) fills 8 bytes into mm0
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; - if (%2 & 7 == 4) fills the last 4 bytes into rax
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; - else if (%2 & 4) fills 4 bytes into mm0-1
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; - if (%2 & 3 == 3) fills 2 bytes into r7/r3, and 1 into eax
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; (note that we're using r3 for body/bottom because it's a shorter
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; opcode, and then the loop fits in 128 bytes)
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; - else fills remaining bytes into rax
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; on x86-32, - fills mm0-7 for consecutive sets of 8 pixels
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; - if (%2 & 7 == 4) fills 4 bytes into ebx
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; - else if (%2 & 4) fills 4 bytes into mm0-7
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; - if (%2 & 3 == 3) fills 2 bytes into r6, and 1 into ebx
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; - else fills remaining bytes into ebx
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; writing data out is in the same way
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%macro READ_NUM_BYTES 2
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%assign %%src_off 0 ; offset in source buffer
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%assign %%smidx 0 ; mmx register idx
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%assign %%sxidx 0 ; xmm register idx
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%if cpuflag(sse)
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%rep %2/16
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movups xmm %+ %%sxidx, [r1+%%src_off]
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%assign %%src_off %%src_off+16
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%assign %%sxidx %%sxidx+1
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%endrep ; %2/16
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%endif
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%if ARCH_X86_64
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%if (%2-%%src_off) == 8
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mov rax, [r1+%%src_off]
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%assign %%src_off %%src_off+8
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%endif ; (%2-%%src_off) == 8
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%endif ; x86-64
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%rep (%2-%%src_off)/8
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movq mm %+ %%smidx, [r1+%%src_off]
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%assign %%src_off %%src_off+8
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%assign %%smidx %%smidx+1
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%endrep ; (%2-%%dst_off)/8
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%if (%2-%%src_off) == 4
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mov vald, [r1+%%src_off]
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%elif (%2-%%src_off) & 4
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movd mm %+ %%smidx, [r1+%%src_off]
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%assign %%src_off %%src_off+4
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%endif ; (%2-%%src_off) ==/& 4
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%if (%2-%%src_off) == 1
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mov vall, [r1+%%src_off]
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%elif (%2-%%src_off) == 2
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mov valw, [r1+%%src_off]
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%elif (%2-%%src_off) == 3
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%ifidn %1, top
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mov valw2, [r1+%%src_off]
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%elifidn %1, body
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mov valw3, [r1+%%src_off]
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%elifidn %1, bottom
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mov valw4, [r1+%%src_off]
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%endif ; %1 ==/!= top
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mov vall, [r1+%%src_off+2]
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%endif ; (%2-%%src_off) == 1/2/3
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%endmacro ; READ_NUM_BYTES
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%macro WRITE_NUM_BYTES 2
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%assign %%dst_off 0 ; offset in destination buffer
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%assign %%dmidx 0 ; mmx register idx
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%assign %%dxidx 0 ; xmm register idx
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%if cpuflag(sse)
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%rep %2/16
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movups [r0+%%dst_off], xmm %+ %%dxidx
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%assign %%dst_off %%dst_off+16
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%assign %%dxidx %%dxidx+1
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%endrep ; %2/16
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%endif
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%if ARCH_X86_64
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%if (%2-%%dst_off) == 8
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mov [r0+%%dst_off], rax
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%assign %%dst_off %%dst_off+8
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%endif ; (%2-%%dst_off) == 8
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%endif ; x86-64
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%rep (%2-%%dst_off)/8
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movq [r0+%%dst_off], mm %+ %%dmidx
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%assign %%dst_off %%dst_off+8
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%assign %%dmidx %%dmidx+1
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%endrep ; (%2-%%dst_off)/8
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%if (%2-%%dst_off) == 4
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mov [r0+%%dst_off], vald
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%elif (%2-%%dst_off) & 4
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movd [r0+%%dst_off], mm %+ %%dmidx
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%assign %%dst_off %%dst_off+4
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%endif ; (%2-%%dst_off) ==/& 4
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%if (%2-%%dst_off) == 1
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mov [r0+%%dst_off], vall
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%elif (%2-%%dst_off) == 2
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mov [r0+%%dst_off], valw
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%elif (%2-%%dst_off) == 3
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%ifidn %1, top
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mov [r0+%%dst_off], valw2
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%elifidn %1, body
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mov [r0+%%dst_off], valw3
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%elifidn %1, bottom
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mov [r0+%%dst_off], valw4
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%endif ; %1 ==/!= top
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mov [r0+%%dst_off+2], vall
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%endif ; (%2-%%dst_off) == 1/2/3
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%endmacro ; WRITE_NUM_BYTES
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; vertical top/bottom extend and body copy fast loops
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; these are function pointers to set-width line copy functions, i.e.
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; they read a fixed number of pixels into set registers, and write
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; those out into the destination buffer
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; r0=buf,r1=src,r2=linesize,r3(64)/r3m(32)=start_x,r4=end_y,r5=block_h
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; r6(eax/64)/r3(ebx/32)=val_reg
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%macro VERTICAL_EXTEND 0
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%assign %%n 1
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%rep 22
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ALIGN 128
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.emuedge_v_extend_ %+ %%n:
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; extend pixels above body
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%if ARCH_X86_64
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test r3 , r3 ; if (!start_y)
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jz .emuedge_copy_body_ %+ %%n %+ _loop ; goto body
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%else ; ARCH_X86_32
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cmp dword r3m, 0
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je .emuedge_copy_body_ %+ %%n %+ _loop
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%endif ; ARCH_X86_64/32
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READ_NUM_BYTES top, %%n ; read bytes
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.emuedge_extend_top_ %+ %%n %+ _loop: ; do {
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WRITE_NUM_BYTES top, %%n ; write bytes
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add r0 , r2 ; dst += linesize
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%if ARCH_X86_64
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dec r3d
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%else ; ARCH_X86_32
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dec dword r3m
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%endif ; ARCH_X86_64/32
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jnz .emuedge_extend_top_ %+ %%n %+ _loop ; } while (--start_y)
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; copy body pixels
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.emuedge_copy_body_ %+ %%n %+ _loop: ; do {
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READ_NUM_BYTES body, %%n ; read bytes
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WRITE_NUM_BYTES body, %%n ; write bytes
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add r0 , r2 ; dst += linesize
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add r1 , r2 ; src += linesize
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dec r4d
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jnz .emuedge_copy_body_ %+ %%n %+ _loop ; } while (--end_y)
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; copy bottom pixels
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test r5 , r5 ; if (!block_h)
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jz .emuedge_v_extend_end_ %+ %%n ; goto end
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sub r1 , r2 ; src -= linesize
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READ_NUM_BYTES bottom, %%n ; read bytes
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.emuedge_extend_bottom_ %+ %%n %+ _loop: ; do {
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WRITE_NUM_BYTES bottom, %%n ; write bytes
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add r0 , r2 ; dst += linesize
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dec r5d
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jnz .emuedge_extend_bottom_ %+ %%n %+ _loop ; } while (--block_h)
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.emuedge_v_extend_end_ %+ %%n:
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%if ARCH_X86_64
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ret
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%else ; ARCH_X86_32
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rep ret
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%endif ; ARCH_X86_64/32
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%assign %%n %%n+1
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%endrep
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%endmacro VERTICAL_EXTEND
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; left/right (horizontal) fast extend functions
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; these are essentially identical to the vertical extend ones above,
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; just left/right separated because number of pixels to extend is
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; obviously not the same on both sides.
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; for reading, pixels are placed in eax (x86-64) or ebx (x86-64) in the
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; lowest two bytes of the register (so val*0x0101), and are splatted
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; into each byte of mm0 as well if n_pixels >= 8
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%macro READ_V_PIXEL 2
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mov vall, %2
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mov valh, vall
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%if %1 >= 8
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movd mm0, vald
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%if cpuflag(mmxext)
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pshufw mm0, mm0, 0
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%else ; mmx
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punpcklwd mm0, mm0
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punpckldq mm0, mm0
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%endif ; sse
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%endif ; %1 >= 8
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%endmacro
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%macro WRITE_V_PIXEL 2
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%assign %%dst_off 0
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%rep %1/8
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movq [%2+%%dst_off], mm0
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%assign %%dst_off %%dst_off+8
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%endrep
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%if %1 & 4
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%if %1 >= 8
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movd [%2+%%dst_off], mm0
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%else ; %1 < 8
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mov [%2+%%dst_off] , valw
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mov [%2+%%dst_off+2], valw
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%endif ; %1 >=/< 8
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%assign %%dst_off %%dst_off+4
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%endif ; %1 & 4
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%if %1&2
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mov [%2+%%dst_off], valw
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%endif ; %1 & 2
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%endmacro
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; r0=buf+block_h*linesize, r1=start_x, r2=linesize, r5=block_h, r6/r3=val
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%macro LEFT_EXTEND 0
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%assign %%n 2
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%rep 11
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ALIGN 64
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.emuedge_extend_left_ %+ %%n: ; do {
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sub r0, r2 ; dst -= linesize
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READ_V_PIXEL %%n, [r0+r1] ; read pixels
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WRITE_V_PIXEL %%n, r0 ; write pixels
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dec r5
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jnz .emuedge_extend_left_ %+ %%n ; } while (--block_h)
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%if ARCH_X86_64
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ret
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%else ; ARCH_X86_32
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rep ret
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%endif ; ARCH_X86_64/32
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%assign %%n %%n+2
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%endrep
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%endmacro ; LEFT_EXTEND
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; r3/r0=buf+block_h*linesize, r2=linesize, r8/r5=block_h, r0/r6=end_x, r6/r3=val
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%macro RIGHT_EXTEND 0
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%assign %%n 2
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%rep 11
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ALIGN 64
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.emuedge_extend_right_ %+ %%n: ; do {
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%if ARCH_X86_64
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sub r3, r2 ; dst -= linesize
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READ_V_PIXEL %%n, [r3+w_reg-1] ; read pixels
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WRITE_V_PIXEL %%n, r3+r4-%%n ; write pixels
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dec r8
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%else ; ARCH_X86_32
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sub r0, r2 ; dst -= linesize
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READ_V_PIXEL %%n, [r0+w_reg-1] ; read pixels
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WRITE_V_PIXEL %%n, r0+r4-%%n ; write pixels
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dec r5
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%endif ; ARCH_X86_64/32
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jnz .emuedge_extend_right_ %+ %%n ; } while (--block_h)
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%if ARCH_X86_64
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ret
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%else ; ARCH_X86_32
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rep ret
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%endif ; ARCH_X86_64/32
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%assign %%n %%n+2
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%endrep
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%if ARCH_X86_32
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%define stack_offset 0x10
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%endif
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%endmacro ; RIGHT_EXTEND
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; below follow the "slow" copy/extend functions, these act on a non-fixed
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; width specified in a register, and run a loop to copy the full amount
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; of bytes. They are optimized for copying of large amounts of pixels per
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; line, so they unconditionally splat data into mm registers to copy 8
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; bytes per loop iteration. It could be considered to use xmm for x86-64
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; also, but I haven't optimized this as much (i.e. FIXME)
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%macro V_COPY_NPX 4-5
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%if %0 == 4
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test w_reg, %4
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jz .%1_skip_%4_px
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%else ; %0 == 5
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.%1_%4_px_loop:
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%endif
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%3 %2, [r1+cnt_reg]
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%3 [r0+cnt_reg], %2
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add cnt_reg, %4
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%if %0 == 5
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sub w_reg, %4
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test w_reg, %5
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jnz .%1_%4_px_loop
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%endif
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.%1_skip_%4_px:
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%endmacro
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%macro V_COPY_ROW 2
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%ifidn %1, bottom
|
|
sub r1, linesize
|
|
%endif
|
|
.%1_copy_loop:
|
|
xor cnt_reg, cnt_reg
|
|
%if notcpuflag(sse)
|
|
%define linesize r2m
|
|
V_COPY_NPX %1, mm0, movq, 8, 0xFFFFFFF8
|
|
%else ; sse
|
|
V_COPY_NPX %1, xmm0, movups, 16, 0xFFFFFFF0
|
|
%if ARCH_X86_64
|
|
%define linesize r2
|
|
V_COPY_NPX %1, rax , mov, 8
|
|
%else ; ARCH_X86_32
|
|
%define linesize r2m
|
|
V_COPY_NPX %1, mm0, movq, 8
|
|
%endif ; ARCH_X86_64/32
|
|
%endif ; sse
|
|
V_COPY_NPX %1, vald, mov, 4
|
|
V_COPY_NPX %1, valw, mov, 2
|
|
V_COPY_NPX %1, vall, mov, 1
|
|
mov w_reg, cnt_reg
|
|
%ifidn %1, body
|
|
add r1, linesize
|
|
%endif
|
|
add r0, linesize
|
|
dec %2
|
|
jnz .%1_copy_loop
|
|
%endmacro
|
|
|
|
%macro SLOW_V_EXTEND 0
|
|
.slow_v_extend_loop:
|
|
; r0=buf,r1=src,r2(64)/r2m(32)=linesize,r3(64)/r3m(32)=start_x,r4=end_y,r5=block_h
|
|
; r8(64)/r3(later-64)/r2(32)=cnt_reg,r6(64)/r3(32)=val_reg,r7(64)/r6(32)=w=end_x-start_x
|
|
%if ARCH_X86_64
|
|
push r8 ; save old value of block_h
|
|
test r3, r3
|
|
%define cnt_reg r8
|
|
jz .do_body_copy ; if (!start_y) goto do_body_copy
|
|
V_COPY_ROW top, r3
|
|
%else
|
|
cmp dword r3m, 0
|
|
%define cnt_reg r2
|
|
je .do_body_copy ; if (!start_y) goto do_body_copy
|
|
V_COPY_ROW top, dword r3m
|
|
%endif
|
|
|
|
.do_body_copy:
|
|
V_COPY_ROW body, r4
|
|
|
|
%if ARCH_X86_64
|
|
pop r8 ; restore old value of block_h
|
|
%define cnt_reg r3
|
|
%endif
|
|
test r5, r5
|
|
%if ARCH_X86_64
|
|
jz .v_extend_end
|
|
%else
|
|
jz .skip_bottom_extend
|
|
%endif
|
|
V_COPY_ROW bottom, r5
|
|
%if ARCH_X86_32
|
|
.skip_bottom_extend:
|
|
mov r2, r2m
|
|
%endif
|
|
jmp .v_extend_end
|
|
%endmacro
|
|
|
|
%macro SLOW_LEFT_EXTEND 0
|
|
.slow_left_extend_loop:
|
|
; r0=buf+block_h*linesize,r2=linesize,r6(64)/r3(32)=val,r5=block_h,r4=cntr,r7/r6=start_x
|
|
mov r4, 8
|
|
sub r0, linesize
|
|
READ_V_PIXEL 8, [r0+w_reg]
|
|
.left_extend_8px_loop:
|
|
movq [r0+r4-8], mm0
|
|
add r4, 8
|
|
cmp r4, w_reg
|
|
jle .left_extend_8px_loop
|
|
sub r4, 8
|
|
cmp r4, w_reg
|
|
jge .left_extend_loop_end
|
|
.left_extend_2px_loop:
|
|
mov [r0+r4], valw
|
|
add r4, 2
|
|
cmp r4, w_reg
|
|
jl .left_extend_2px_loop
|
|
.left_extend_loop_end:
|
|
dec r5
|
|
jnz .slow_left_extend_loop
|
|
%if ARCH_X86_32
|
|
mov r2, r2m
|
|
%endif
|
|
jmp .right_extend
|
|
%endmacro
|
|
|
|
%macro SLOW_RIGHT_EXTEND 0
|
|
.slow_right_extend_loop:
|
|
; r3(64)/r0(32)=buf+block_h*linesize,r2=linesize,r4=block_w,r8(64)/r5(32)=block_h,
|
|
; r7(64)/r6(32)=end_x,r6/r3=val,r1=cntr
|
|
%if ARCH_X86_64
|
|
%define buf_reg r3
|
|
%define bh_reg r8
|
|
%else
|
|
%define buf_reg r0
|
|
%define bh_reg r5
|
|
%endif
|
|
lea r1, [r4-8]
|
|
sub buf_reg, linesize
|
|
READ_V_PIXEL 8, [buf_reg+w_reg-1]
|
|
.right_extend_8px_loop:
|
|
movq [buf_reg+r1], mm0
|
|
sub r1, 8
|
|
cmp r1, w_reg
|
|
jge .right_extend_8px_loop
|
|
add r1, 8
|
|
cmp r1, w_reg
|
|
je .right_extend_loop_end
|
|
.right_extend_2px_loop:
|
|
sub r1, 2
|
|
mov [buf_reg+r1], valw
|
|
cmp r1, w_reg
|
|
jg .right_extend_2px_loop
|
|
.right_extend_loop_end:
|
|
dec bh_reg
|
|
jnz .slow_right_extend_loop
|
|
jmp .h_extend_end
|
|
%endmacro
|
|
|
|
%macro emu_edge 1
|
|
INIT_XMM %1
|
|
EMU_EDGE_FUNC
|
|
VERTICAL_EXTEND
|
|
LEFT_EXTEND
|
|
RIGHT_EXTEND
|
|
SLOW_V_EXTEND
|
|
SLOW_LEFT_EXTEND
|
|
SLOW_RIGHT_EXTEND
|
|
%endmacro
|
|
|
|
emu_edge sse
|
|
%if ARCH_X86_32
|
|
emu_edge mmx
|
|
%endif
|
|
|
|
%macro PREFETCH_FN 1
|
|
cglobal prefetch, 3, 3, 0, buf, stride, h
|
|
.loop:
|
|
%1 [bufq]
|
|
add bufq, strideq
|
|
dec hd
|
|
jg .loop
|
|
REP_RET
|
|
%endmacro
|
|
|
|
INIT_MMX mmxext
|
|
PREFETCH_FN prefetcht0
|
|
%if ARCH_X86_32
|
|
INIT_MMX 3dnow
|
|
PREFETCH_FN prefetch
|
|
%endif
|