mirror of
https://git.videolan.org/git/ffmpeg.git
synced 2024-08-20 08:15:06 +02:00
204 lines
5.6 KiB
C
204 lines
5.6 KiB
C
/*
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* Copyright (C) 2009 David Conrad
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <string.h>
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#include "config.h"
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#include "libavutil/attributes.h"
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#include "libavutil/cpu.h"
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#include "libavutil/ppc/cpu.h"
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#include "libavutil/ppc/types_altivec.h"
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#include "libavutil/ppc/util_altivec.h"
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#include "libavcodec/vp3dsp.h"
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#if HAVE_ALTIVEC
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static const vec_s16 constants =
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{0, 64277, 60547, 54491, 46341, 36410, 25080, 12785};
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#if HAVE_BIGENDIAN
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static const vec_u8 interleave_high =
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{0, 1, 16, 17, 4, 5, 20, 21, 8, 9, 24, 25, 12, 13, 28, 29};
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#else
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static const vec_u8 interleave_high =
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{2, 3, 18, 19, 6, 7, 22, 23, 10, 11, 26, 27, 14, 15, 30, 31};
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#endif
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#define IDCT_START \
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vec_s16 A, B, C, D, Ad, Bd, Cd, Dd, E, F, G, H;\
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vec_s16 Ed, Gd, Add, Bdd, Fd, Hd;\
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vec_s16 eight = vec_splat_s16(8);\
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vec_u16 four = vec_splat_u16(4);\
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\
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vec_s16 C1 = vec_splat(constants, 1);\
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vec_s16 C2 = vec_splat(constants, 2);\
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vec_s16 C3 = vec_splat(constants, 3);\
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vec_s16 C4 = vec_splat(constants, 4);\
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vec_s16 C5 = vec_splat(constants, 5);\
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vec_s16 C6 = vec_splat(constants, 6);\
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vec_s16 C7 = vec_splat(constants, 7);\
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\
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vec_s16 b0 = vec_ld(0x00, block);\
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vec_s16 b1 = vec_ld(0x10, block);\
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vec_s16 b2 = vec_ld(0x20, block);\
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vec_s16 b3 = vec_ld(0x30, block);\
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vec_s16 b4 = vec_ld(0x40, block);\
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vec_s16 b5 = vec_ld(0x50, block);\
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vec_s16 b6 = vec_ld(0x60, block);\
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vec_s16 b7 = vec_ld(0x70, block);
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// these functions do (a*C)>>16
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// things are tricky because a is signed, but C unsigned.
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// M15 is used if C fits in 15 bit unsigned (C6,C7)
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// M16 is used if C requires 16 bits unsigned
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static inline vec_s16 M15(vec_s16 a, vec_s16 C)
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{
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return (vec_s16)vec_perm(vec_mule(a,C), vec_mulo(a,C), interleave_high);
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}
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static inline vec_s16 M16(vec_s16 a, vec_s16 C)
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{
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return vec_add(a, M15(a, C));
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}
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#define IDCT_1D(ADD, SHIFT)\
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A = vec_add(M16(b1, C1), M15(b7, C7));\
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B = vec_sub(M15(b1, C7), M16(b7, C1));\
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C = vec_add(M16(b3, C3), M16(b5, C5));\
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D = vec_sub(M16(b5, C3), M16(b3, C5));\
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\
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Ad = M16(vec_sub(A, C), C4);\
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Bd = M16(vec_sub(B, D), C4);\
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\
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Cd = vec_add(A, C);\
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Dd = vec_add(B, D);\
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\
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E = ADD(M16(vec_add(b0, b4), C4));\
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F = ADD(M16(vec_sub(b0, b4), C4));\
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\
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G = vec_add(M16(b2, C2), M15(b6, C6));\
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H = vec_sub(M15(b2, C6), M16(b6, C2));\
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\
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Ed = vec_sub(E, G);\
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Gd = vec_add(E, G);\
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\
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Add = vec_add(F, Ad);\
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Bdd = vec_sub(Bd, H);\
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\
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Fd = vec_sub(F, Ad);\
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Hd = vec_add(Bd, H);\
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\
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b0 = SHIFT(vec_add(Gd, Cd));\
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b7 = SHIFT(vec_sub(Gd, Cd));\
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\
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b1 = SHIFT(vec_add(Add, Hd));\
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b2 = SHIFT(vec_sub(Add, Hd));\
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\
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b3 = SHIFT(vec_add(Ed, Dd));\
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b4 = SHIFT(vec_sub(Ed, Dd));\
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\
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b5 = SHIFT(vec_add(Fd, Bdd));\
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b6 = SHIFT(vec_sub(Fd, Bdd));
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#define NOP(a) a
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#define ADD8(a) vec_add(a, eight)
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#define SHIFT4(a) vec_sra(a, four)
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static void vp3_idct_put_altivec(uint8_t *dst, int stride, int16_t block[64])
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{
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vec_u8 t;
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IDCT_START
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// pixels are signed; so add 128*16 in addition to the normal 8
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vec_s16 v2048 = vec_sl(vec_splat_s16(1), vec_splat_u16(11));
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eight = vec_add(eight, v2048);
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IDCT_1D(NOP, NOP)
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TRANSPOSE8(b0, b1, b2, b3, b4, b5, b6, b7);
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IDCT_1D(ADD8, SHIFT4)
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#define PUT(a)\
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t = vec_packsu(a, a);\
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vec_ste((vec_u32)t, 0, (unsigned int *)dst);\
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vec_ste((vec_u32)t, 4, (unsigned int *)dst);
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PUT(b0) dst += stride;
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PUT(b1) dst += stride;
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PUT(b2) dst += stride;
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PUT(b3) dst += stride;
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PUT(b4) dst += stride;
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PUT(b5) dst += stride;
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PUT(b6) dst += stride;
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PUT(b7)
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memset(block, 0, sizeof(*block) * 64);
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}
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static void vp3_idct_add_altivec(uint8_t *dst, int stride, int16_t block[64])
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{
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LOAD_ZERO;
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vec_u8 t, vdst;
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vec_s16 vdst_16;
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vec_u8 vdst_mask = vec_mergeh(vec_splat_u8(-1), vec_lvsl(0, dst));
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IDCT_START
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IDCT_1D(NOP, NOP)
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TRANSPOSE8(b0, b1, b2, b3, b4, b5, b6, b7);
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IDCT_1D(ADD8, SHIFT4)
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#if HAVE_BIGENDIAN
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#define GET_VDST16\
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vdst = vec_ld(0, dst);\
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vdst_16 = (vec_s16)vec_perm(vdst, zero_u8v, vdst_mask);
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#else
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#define GET_VDST16\
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vdst = vec_vsx_ld(0,dst);\
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vdst_16 = (vec_s16)vec_mergeh(vdst, zero_u8v);
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#endif
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#define ADD(a)\
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GET_VDST16;\
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vdst_16 = vec_adds(a, vdst_16);\
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t = vec_packsu(vdst_16, vdst_16);\
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vec_ste((vec_u32)t, 0, (unsigned int *)dst);\
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vec_ste((vec_u32)t, 4, (unsigned int *)dst);
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ADD(b0) dst += stride;
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ADD(b1) dst += stride;
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ADD(b2) dst += stride;
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ADD(b3) dst += stride;
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ADD(b4) dst += stride;
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ADD(b5) dst += stride;
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ADD(b6) dst += stride;
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ADD(b7)
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memset(block, 0, sizeof(*block) * 64);
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}
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#endif /* HAVE_ALTIVEC */
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av_cold void ff_vp3dsp_init_ppc(VP3DSPContext *c, int flags)
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{
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#if HAVE_ALTIVEC
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if (!PPC_ALTIVEC(av_get_cpu_flags()))
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return;
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c->idct_put = vp3_idct_put_altivec;
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c->idct_add = vp3_idct_add_altivec;
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#endif
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}
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