mirror of
https://git.videolan.org/git/ffmpeg.git
synced 2024-09-05 15:58:07 +02:00
143 lines
4.8 KiB
NASM
143 lines
4.8 KiB
NASM
;******************************************************************************
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;* VP9 IDCT SIMD optimizations
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;*
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;* Copyright (C) 2013 Clément Bœsch <u pkh me>
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;* Copyright (C) 2013 Ronald S. Bultje <rsbultje gmail com>
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;*
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;* This file is part of FFmpeg.
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;*
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;* FFmpeg is free software; you can redistribute it and/or
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;* modify it under the terms of the GNU Lesser General Public
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;* License as published by the Free Software Foundation; either
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;* version 2.1 of the License, or (at your option) any later version.
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;*
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;* FFmpeg is distributed in the hope that it will be useful,
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;* but WITHOUT ANY WARRANTY; without even the implied warranty of
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;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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;* Lesser General Public License for more details.
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;*
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;* You should have received a copy of the GNU Lesser General Public
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;* License along with FFmpeg; if not, write to the Free Software
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;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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;******************************************************************************
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%macro VP9_IWHT4_1D 0
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SWAP 1, 2, 3
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paddw m0, m2
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psubw m3, m1
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psubw m4, m0, m3
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psraw m4, 1
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psubw m5, m4, m1
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SWAP 5, 1
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psubw m4, m2
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SWAP 4, 2
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psubw m0, m1
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paddw m3, m2
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SWAP 3, 2, 1
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%endmacro
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; (a*x + b*y + round) >> shift
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%macro VP9_MULSUB_2W_2X 5 ; dst1, dst2/src, round, coefs1, coefs2
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pmaddwd m%1, m%2, %4
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pmaddwd m%2, %5
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paddd m%1, %3
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paddd m%2, %3
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psrad m%1, 14
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psrad m%2, 14
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%endmacro
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%macro VP9_MULSUB_2W_4X 7 ; dst1, dst2, coef1, coef2, rnd, tmp1/src, tmp2
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VP9_MULSUB_2W_2X %7, %6, %5, [pw_m%3_%4], [pw_%4_%3]
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VP9_MULSUB_2W_2X %1, %2, %5, [pw_m%3_%4], [pw_%4_%3]
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packssdw m%1, m%7
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packssdw m%2, m%6
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%endmacro
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%macro VP9_UNPACK_MULSUB_2W_4X 7-9 ; dst1, dst2, (src1, src2,) coef1, coef2, rnd, tmp1, tmp2
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%if %0 == 7
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punpckhwd m%6, m%2, m%1
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punpcklwd m%2, m%1
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VP9_MULSUB_2W_4X %1, %2, %3, %4, %5, %6, %7
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%else
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punpckhwd m%8, m%4, m%3
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punpcklwd m%2, m%4, m%3
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VP9_MULSUB_2W_4X %1, %2, %5, %6, %7, %8, %9
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%endif
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%endmacro
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%macro VP9_IDCT4_1D_FINALIZE 0
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SUMSUB_BA w, 3, 2, 4 ; m3=t3+t0, m2=-t3+t0
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SUMSUB_BA w, 1, 0, 4 ; m1=t2+t1, m0=-t2+t1
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SWAP 0, 3, 2 ; 3102 -> 0123
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%endmacro
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%macro VP9_IDCT4_1D 0
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%if cpuflag(ssse3)
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SUMSUB_BA w, 2, 0, 4 ; m2=IN(0)+IN(2) m0=IN(0)-IN(2)
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pmulhrsw m2, m6 ; m2=t0
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pmulhrsw m0, m6 ; m0=t1
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%else ; <= sse2
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VP9_UNPACK_MULSUB_2W_4X 0, 2, 11585, 11585, m7, 4, 5 ; m0=t1, m1=t0
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%endif
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VP9_UNPACK_MULSUB_2W_4X 1, 3, 15137, 6270, m7, 4, 5 ; m1=t2, m3=t3
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VP9_IDCT4_1D_FINALIZE
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%endmacro
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%macro VP9_IADST4_1D 0
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movq2dq xmm0, m0
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movq2dq xmm1, m1
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movq2dq xmm2, m2
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movq2dq xmm3, m3
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%if cpuflag(ssse3)
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paddw m3, m0
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%endif
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punpcklwd xmm0, xmm1
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punpcklwd xmm2, xmm3
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pmaddwd xmm1, xmm0, [pw_5283_13377]
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pmaddwd xmm4, xmm0, [pw_9929_13377]
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%if notcpuflag(ssse3)
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pmaddwd xmm6, xmm0, [pw_13377_0]
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%endif
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pmaddwd xmm0, [pw_15212_m13377]
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pmaddwd xmm3, xmm2, [pw_15212_9929]
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%if notcpuflag(ssse3)
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pmaddwd xmm7, xmm2, [pw_m13377_13377]
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%endif
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pmaddwd xmm2, [pw_m5283_m15212]
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%if cpuflag(ssse3)
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psubw m3, m2
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%else
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paddd xmm6, xmm7
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%endif
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paddd xmm0, xmm2
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paddd xmm3, xmm5
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paddd xmm2, xmm5
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%if notcpuflag(ssse3)
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paddd xmm6, xmm5
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%endif
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paddd xmm1, xmm3
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paddd xmm0, xmm3
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paddd xmm4, xmm2
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psrad xmm1, 14
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psrad xmm0, 14
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psrad xmm4, 14
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%if cpuflag(ssse3)
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pmulhrsw m3, [pw_13377x2] ; out2
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%else
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psrad xmm6, 14
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%endif
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packssdw xmm0, xmm0
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packssdw xmm1, xmm1
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packssdw xmm4, xmm4
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%if notcpuflag(ssse3)
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packssdw xmm6, xmm6
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%endif
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movdq2q m0, xmm0 ; out3
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movdq2q m1, xmm1 ; out0
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movdq2q m2, xmm4 ; out1
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%if notcpuflag(ssse3)
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movdq2q m3, xmm6 ; out2
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%endif
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SWAP 0, 1, 2, 3
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%endmacro
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