mirror of
https://git.videolan.org/git/ffmpeg.git
synced 2024-09-05 15:58:07 +02:00
349 lines
8.3 KiB
NASM
349 lines
8.3 KiB
NASM
;******************************************************************************
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;* Copyright (c) 2010 David Conrad
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;*
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;* This file is part of FFmpeg.
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;*
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;* FFmpeg is free software; you can redistribute it and/or
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;* modify it under the terms of the GNU Lesser General Public
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;* License as published by the Free Software Foundation; either
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;* version 2.1 of the License, or (at your option) any later version.
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;*
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;* FFmpeg is distributed in the hope that it will be useful,
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;* but WITHOUT ANY WARRANTY; without even the implied warranty of
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;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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;* Lesser General Public License for more details.
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;*
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;* You should have received a copy of the GNU Lesser General Public
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;* License along with FFmpeg; if not, write to the Free Software
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;* 51, Inc., Foundation Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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;******************************************************************************
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%include "libavutil/x86/x86util.asm"
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SECTION_RODATA
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pw_7: times 8 dw 7
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convert_to_unsigned_10bit: times 4 dd 0x200
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clip_10bit: times 8 dw 0x3ff
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cextern pw_3
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cextern pw_16
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cextern pw_32
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cextern pb_80
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SECTION .text
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%macro UNPACK_ADD 6
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mov%5 %1, %3
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mov%6 m5, %4
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mova m4, %1
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mova %2, m5
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punpcklbw %1, m7
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punpcklbw m5, m7
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punpckhbw m4, m7
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punpckhbw %2, m7
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paddw %1, m5
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paddw %2, m4
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%endmacro
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%macro HPEL_FILTER 1
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; dirac_hpel_filter_v_sse2(uint8_t *dst, uint8_t *src, int stride, int width);
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cglobal dirac_hpel_filter_v_%1, 4,6,8, dst, src, stride, width, src0, stridex3
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mov src0q, srcq
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lea stridex3q, [3*strideq]
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sub src0q, stridex3q
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pxor m7, m7
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.loop:
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; 7*(src[0] + src[1])
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UNPACK_ADD m0, m1, [srcq], [srcq + strideq], a,a
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pmullw m0, [pw_7]
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pmullw m1, [pw_7]
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; 3*( ... + src[-2] + src[3])
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UNPACK_ADD m2, m3, [src0q + strideq], [srcq + stridex3q], a,a
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paddw m0, m2
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paddw m1, m3
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pmullw m0, [pw_3]
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pmullw m1, [pw_3]
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; ... - 7*(src[-1] + src[2])
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UNPACK_ADD m2, m3, [src0q + strideq*2], [srcq + strideq*2], a,a
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pmullw m2, [pw_7]
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pmullw m3, [pw_7]
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psubw m0, m2
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psubw m1, m3
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; ... - (src[-3] + src[4])
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UNPACK_ADD m2, m3, [src0q], [srcq + strideq*4], a,a
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psubw m0, m2
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psubw m1, m3
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paddw m0, [pw_16]
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paddw m1, [pw_16]
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psraw m0, 5
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psraw m1, 5
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packuswb m0, m1
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mova [dstq], m0
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add dstq, mmsize
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add srcq, mmsize
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add src0q, mmsize
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sub widthd, mmsize
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jg .loop
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RET
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; dirac_hpel_filter_h_sse2(uint8_t *dst, uint8_t *src, int width);
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cglobal dirac_hpel_filter_h_%1, 3,3,8, dst, src, width
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dec widthd
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pxor m7, m7
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and widthd, ~(mmsize-1)
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.loop:
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; 7*(src[0] + src[1])
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UNPACK_ADD m0, m1, [srcq + widthq], [srcq + widthq + 1], u,u
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pmullw m0, [pw_7]
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pmullw m1, [pw_7]
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; 3*( ... + src[-2] + src[3])
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UNPACK_ADD m2, m3, [srcq + widthq - 2], [srcq + widthq + 3], u,u
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paddw m0, m2
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paddw m1, m3
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pmullw m0, [pw_3]
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pmullw m1, [pw_3]
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; ... - 7*(src[-1] + src[2])
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UNPACK_ADD m2, m3, [srcq + widthq - 1], [srcq + widthq + 2], u,u
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pmullw m2, [pw_7]
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pmullw m3, [pw_7]
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psubw m0, m2
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psubw m1, m3
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; ... - (src[-3] + src[4])
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UNPACK_ADD m2, m3, [srcq + widthq - 3], [srcq + widthq + 4], u,u
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psubw m0, m2
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psubw m1, m3
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paddw m0, [pw_16]
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paddw m1, [pw_16]
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psraw m0, 5
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psraw m1, 5
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packuswb m0, m1
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mova [dstq + widthq], m0
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sub widthd, mmsize
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jge .loop
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RET
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%endmacro
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%macro PUT_RECT 1
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; void put_rect_clamped(uint8_t *dst, int dst_stride, int16_t *src, int src_stride, int width, int height)
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cglobal put_signed_rect_clamped_%1, 5,9,3, dst, dst_stride, src, src_stride, w, dst2, src2
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mova m0, [pb_80]
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add wd, (mmsize-1)
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and wd, ~(mmsize-1)
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%if ARCH_X86_64
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movsxd dst_strideq, dst_strided
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movsxd src_strideq, src_strided
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mov r7d, r5m
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mov r8d, wd
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%define wspill r8d
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%define hd r7d
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%else
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mov r4m, wd
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%define wspill r4m
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%define hd r5mp
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%endif
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.loopy:
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lea src2q, [srcq+src_strideq]
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lea dst2q, [dstq+dst_strideq]
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.loopx:
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sub wd, mmsize
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mova m1, [srcq +2*wq]
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mova m2, [src2q+2*wq]
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packsswb m1, [srcq +2*wq+mmsize]
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packsswb m2, [src2q+2*wq+mmsize]
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paddb m1, m0
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paddb m2, m0
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mova [dstq +wq], m1
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mova [dst2q+wq], m2
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jg .loopx
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lea srcq, [srcq+src_strideq*2]
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lea dstq, [dstq+dst_strideq*2]
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sub hd, 2
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mov wd, wspill
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jg .loopy
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RET
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%endm
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%macro ADD_RECT 1
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; void add_rect_clamped(uint8_t *dst, uint16_t *src, int stride, int16_t *idwt, int idwt_stride, int width, int height)
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cglobal add_rect_clamped_%1, 7,9,3, dst, src, stride, idwt, idwt_stride, w, h
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mova m0, [pw_32]
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add wd, (mmsize-1)
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and wd, ~(mmsize-1)
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%if ARCH_X86_64
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movsxd strideq, strided
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movsxd idwt_strideq, idwt_strided
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mov r8d, wd
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%define wspill r8d
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%else
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mov r5m, wd
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%define wspill r5m
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%endif
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.loop:
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sub wd, mmsize
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movu m1, [srcq +2*wq] ; FIXME: ensure alignment
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paddw m1, m0
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psraw m1, 6
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movu m2, [srcq +2*wq+mmsize] ; FIXME: ensure alignment
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paddw m2, m0
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psraw m2, 6
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paddw m1, [idwtq+2*wq]
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paddw m2, [idwtq+2*wq+mmsize]
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packuswb m1, m2
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mova [dstq +wq], m1
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jg .loop
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lea srcq, [srcq + 2*strideq]
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add dstq, strideq
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lea idwtq, [idwtq+ 2*idwt_strideq]
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sub hd, 1
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mov wd, wspill
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jg .loop
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RET
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%endm
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%macro ADD_OBMC 2
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; void add_obmc(uint16_t *dst, uint8_t *src, int stride, uint8_t *obmc_weight, int yblen)
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cglobal add_dirac_obmc%1_%2, 6,6,5, dst, src, stride, obmc, yblen
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pxor m4, m4
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.loop:
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%assign i 0
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%rep %1 / mmsize
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mova m0, [srcq+i]
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mova m1, m0
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punpcklbw m0, m4
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punpckhbw m1, m4
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mova m2, [obmcq+i]
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mova m3, m2
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punpcklbw m2, m4
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punpckhbw m3, m4
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pmullw m0, m2
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pmullw m1, m3
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movu m2, [dstq+2*i]
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movu m3, [dstq+2*i+mmsize]
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paddw m0, m2
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paddw m1, m3
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movu [dstq+2*i], m0
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movu [dstq+2*i+mmsize], m1
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%assign i i+mmsize
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%endrep
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lea srcq, [srcq+strideq]
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lea dstq, [dstq+2*strideq]
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add obmcq, 32
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sub yblend, 1
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jg .loop
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RET
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%endm
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INIT_MMX
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%if ARCH_X86_64 == 0
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PUT_RECT mmx
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ADD_RECT mmx
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HPEL_FILTER mmx
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ADD_OBMC 32, mmx
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ADD_OBMC 16, mmx
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%endif
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ADD_OBMC 8, mmx
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INIT_XMM
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PUT_RECT sse2
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ADD_RECT sse2
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HPEL_FILTER sse2
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ADD_OBMC 32, sse2
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ADD_OBMC 16, sse2
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INIT_XMM sse4
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; void dequant_subband_32(uint8_t *src, uint8_t *dst, ptrdiff_t stride, const int qf, const int qs, int tot_v, int tot_h)
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cglobal dequant_subband_32, 7, 7, 4, src, dst, stride, qf, qs, tot_v, tot_h
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movd m2, qfd
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movd m3, qsd
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SPLATD m2
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SPLATD m3
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mov r4d, tot_hd
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mov r3, dstq
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.loop_v:
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mov tot_hq, r4
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mov dstq, r3
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.loop_h:
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movu m0, [srcq]
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pabsd m1, m0
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pmulld m1, m2
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paddd m1, m3
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psrld m1, 2
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psignd m1, m0
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movu [dstq], m1
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add srcq, mmsize
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add dstq, mmsize
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sub tot_hq, 4
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jg .loop_h
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lea srcq, [srcq + 4*tot_hq]
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add r3, strideq
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dec tot_vd
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jg .loop_v
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RET
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INIT_XMM sse4
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; void put_signed_rect_clamped_10(uint8_t *dst, int dst_stride, const uint8_t *src, int src_stride, int width, int height)
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%if ARCH_X86_64
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cglobal put_signed_rect_clamped_10, 6, 8, 5, dst, dst_stride, src, src_stride, w, h, t1, t2
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%else
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cglobal put_signed_rect_clamped_10, 5, 7, 5, dst, dst_stride, src, src_stride, w, t1, t2
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%define hd r5mp
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%endif
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shl wd, 2
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add srcq, wq
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neg wq
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mov t2q, dstq
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mov t1q, wq
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pxor m2, m2
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mova m3, [clip_10bit]
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mova m4, [convert_to_unsigned_10bit]
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.loop_h:
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mov dstq, t2q
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mov wq, t1q
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.loop_w:
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movu m0, [srcq+wq+0*mmsize]
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movu m1, [srcq+wq+1*mmsize]
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paddd m0, m4
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paddd m1, m4
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packusdw m0, m0, m1
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CLIPW m0, m2, m3 ; packusdw saturates so it's fine
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movu [dstq], m0
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add dstq, 1*mmsize
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add wq, 2*mmsize
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jl .loop_w
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add srcq, src_strideq
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add t2q, dst_strideq
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sub hd, 1
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jg .loop_h
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RET
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