riscv: factor out the bswap32 assembler

This commit is contained in:
Rémi Denis-Courmont 2023-09-29 20:03:36 +03:00
parent 4fe0a31cab
commit cec48e3b32
2 changed files with 67 additions and 41 deletions

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@ -20,49 +20,10 @@
#include "config.h"
#include "libavutil/riscv/asm.S"
#include "libavutil/riscv/bswap_rvb.S"
#if (__riscv_xlen >= 64)
func ff_bswap32_buf_rvb, zbb
andi t0, a1, 4
beqz t0, 1f
/* Align a1 (input) to 64-bit */
lwu t0, (a1)
addi a0, a0, 4
rev8 t0, t0
addi a2, a2, -1
srli t0, t0, __riscv_xlen - 32
addi a1, a1, 4
sw t0, -4(a0)
1:
andi a3, a2, -2
sh2add a2, a2, a0
beqz a3, 3f
sh2add a3, a3, a0
2: /* 2 elements (64 bits) at a time on a 64-bit boundary */
ld t0, (a1)
addi a0, a0, 8
rev8 t0, t0
#if (__riscv_xlen == 64)
srli t2, t0, 32
sw t0, -4(a0)
#else
srli t1, t0, __riscv_xlen - 64
srli t2, t0, __riscv_xlen - 32
sw t1, -4(a0)
#endif
addi a1, a1, 8
sw t2, -8(a0)
bne a0, a3, 2b
3:
beq a0, a2, 5f
4: /* Process last element */
lwu t0, (a1)
addi a0, a0, 4
rev8 t0, t0
addi a1, a1, 4
srli t0, t0, __riscv_xlen - 32
sw t0, -4(a0)
5:
ret
bswap32_rvb a0, a1, a2
endfunc
#endif

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@ -0,0 +1,65 @@
/*
* Copyright © 2022 Rémi Denis-Courmont.
*
* This file is part of FFmpeg.
*
* FFmpeg is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2.1 of the License, or (at your option) any later version.
*
* FFmpeg is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with FFmpeg; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
*/
#if (__riscv_xlen >= 64)
.macro bswap32_rvb out, in, count
andi t0, \count, 4
beqz t0, 1f
/* Align input to 64-bit */
lwu t0, (\in)
addi \out, \out, 4
rev8 t0, t0
addi \count, \count, -1
srli t0, t0, __riscv_xlen - 32
addi \in, \in, 4
sw t0, -4(\out)
1:
andi t3, \count, -2
sh2add \count, \count, \out
beqz t3, 3f
sh2add t3, t3, \out
2: /* 2 elements (64 bits) at a time on a 64-bit boundary */
ld t0, (\in)
addi \out, \out, 8
rev8 t0, t0
#if (__riscv_xlen == 64)
srli t2, t0, 32
sw t0, -4(\out)
#else
srli t1, t0, __riscv_xlen - 64
srli t2, t0, __riscv_xlen - 32
sw t1, -4(\out)
#endif
addi \in, \in, 8
sw t2, -8(\out)
bne \out, t3, 2b
3:
beq \out, \count, 5f
4: /* Process last element */
lwu t0, (\in)
addi \out, \out, 4
rev8 t0, t0
addi \in, \in, 4
srli t0, t0, __riscv_xlen - 32
sw t0, -4(\out)
5:
ret
.endm
#endif