arm: relax byte-swap assembler constraints

There are no particular reasons to force the compiler to use the same
register as output and input operand. This forces an extra MOV
instruction if the input value needs to be reused after the swap.

In most cases, this makes no differences, as the compiler will seleect
the same register for both operands either way.

Signed-off-by: Martin Storsjö <martin@martin.st>
This commit is contained in:
Rémi Denis-Courmont 2022-09-03 18:05:18 +03:00 committed by Martin Storsjö
parent 164021423a
commit 620e6e1487
1 changed files with 10 additions and 7 deletions

View File

@ -39,8 +39,10 @@ static av_always_inline av_const uint32_t av_bswap32(uint32_t x)
#define av_bswap16 av_bswap16
static av_always_inline av_const unsigned av_bswap16(unsigned x)
{
__asm__("rev16 %0, %0" : "+r"(x));
return x;
unsigned y;
__asm__("rev16 %0, %1" : "=r"(y) : "r"(x));
return y;
}
#endif
@ -48,17 +50,18 @@ static av_always_inline av_const unsigned av_bswap16(unsigned x)
#define av_bswap32 av_bswap32
static av_always_inline av_const uint32_t av_bswap32(uint32_t x)
{
uint32_t y;
#if HAVE_ARMV6_INLINE
__asm__("rev %0, %0" : "+r"(x));
__asm__("rev %0, %1" : "=r"(y) : "r"(x));
#else
uint32_t t;
__asm__ ("eor %1, %0, %0, ror #16 \n\t"
__asm__ ("eor %1, %2, %2, ror #16 \n\t"
"bic %1, %1, #0xFF0000 \n\t"
"mov %0, %0, ror #8 \n\t"
"mov %0, %2, ror #8 \n\t"
"eor %0, %0, %1, lsr #8 \n\t"
: "+r"(x), "=&r"(t));
: "=r"(y), "=&r"(t) : "r"(x));
#endif /* HAVE_ARMV6_INLINE */
return x;
return y;
}
#endif /* AV_GCC_VERSION_AT_MOST(4,4) */