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dav1d
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Alphabetize architecture defines and usage

This commit is contained in:
Nathan E. Egge 2024-01-30 12:58:00 -05:00
parent 219befefeb
commit a6878be7e0
4 changed files with 27 additions and 27 deletions
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2
include/common/attributes.h
View File

@ -60,7 +60,7 @@
#define ALIGN_64_VAL 64
#define ALIGN_32_VAL 32
#define ALIGN_16_VAL 16
#elif ARCH_X86_32 || ARCH_ARM || ARCH_AARCH64 || ARCH_PPC64LE || ARCH_LOONGARCH
#elif ARCH_AARCH64 || ARCH_ARM || ARCH_LOONGARCH || ARCH_PPC64LE || ARCH_X86_32
/* ARM doesn't benefit from anything more than 16-byte alignment. */
#define ALIGN_64_VAL 16
#define ALIGN_32_VAL 16

12
meson.build
View File

@ -62,13 +62,13 @@ endforeach
# ASM option
is_asm_enabled = (get_option('enable_asm') == true and
(host_machine.cpu_family() == 'x86' or
(host_machine.cpu_family() == 'x86_64' and cc.get_define('__ILP32__').strip() == '') or
host_machine.cpu_family() == 'aarch64' or
(host_machine.cpu_family() == 'aarch64' or
host_machine.cpu_family().startswith('arm') or
host_machine.cpu() == 'ppc64le' or
host_machine.cpu_family().startswith('riscv') or
host_machine.cpu_family().startswith('loongarch')))
host_machine.cpu_family().startswith('loongarch') or
host_machine.cpu_family() == 'x86' or
(host_machine.cpu_family() == 'x86_64' and cc.get_define('__ILP32__').strip() == '')))
cdata.set10('HAVE_ASM', is_asm_enabled)
if is_asm_enabled and get_option('b_sanitize') == 'memory'
@ -234,9 +234,9 @@ endif
if (host_machine.cpu_family() == 'aarch64' or
host_machine.cpu_family().startswith('arm') or
host_machine.cpu_family().startswith('loongarch') or
host_machine.cpu() == 'ppc64le' or
host_machine.cpu_family().startswith('riscv') or
host_machine.cpu_family().startswith('loongarch'))
host_machine.cpu_family().startswith('riscv'))
if cc.has_function('getauxval', prefix : '#include <sys/auxv.h>', args : test_args)
cdata.set('HAVE_GETAUXVAL', 1)
endif

36
src/meson.build
View File

@ -226,24 +226,6 @@ if is_asm_enabled
# Compile the ASM sources with NASM
libdav1d_asm_objs = nasm_gen.process(libdav1d_sources_asm)
elif host_machine.cpu() == 'ppc64le'
arch_flags = ['-maltivec', '-mvsx']
libdav1d_sources += files(
'ppc/cpu.c',
)
libdav1d_arch_tmpl_sources += files(
'ppc/cdef_tmpl.c',
'ppc/looprestoration_tmpl.c',
)
elif host_machine.cpu_family().startswith('riscv')
libdav1d_sources += files(
'riscv/cpu.c',
)
if host_machine.cpu_family() == 'riscv64'
libdav1d_sources += files(
'riscv/64/itx.S',
)
endif
elif host_machine.cpu_family().startswith('loongarch')
libdav1d_sources += files(
'loongarch/cpu.c',
@ -262,6 +244,24 @@ if is_asm_enabled
'loongarch/itx.S',
)
libdav1d_asm_objs += libdav1d_sources_asm
elif host_machine.cpu() == 'ppc64le'
arch_flags = ['-maltivec', '-mvsx']
libdav1d_sources += files(
'ppc/cpu.c',
)
libdav1d_arch_tmpl_sources += files(
'ppc/cdef_tmpl.c',
'ppc/looprestoration_tmpl.c',
)
elif host_machine.cpu_family().startswith('riscv')
libdav1d_sources += files(
'riscv/cpu.c',
)
if host_machine.cpu_family() == 'riscv64'
libdav1d_sources += files(
'riscv/64/itx.S',
)
endif
endif
endif

4
tests/checkasm/checkasm.c
View File

@ -102,11 +102,11 @@ static const struct {
{ "AVX-512 (Ice Lake)", "avx512icl", DAV1D_X86_CPU_FLAG_AVX512ICL },
#elif ARCH_AARCH64 || ARCH_ARM
{ "NEON", "neon", DAV1D_ARM_CPU_FLAG_NEON },
#elif ARCH_PPC64LE
{ "VSX", "vsx", DAV1D_PPC_CPU_FLAG_VSX },
#elif ARCH_LOONGARCH
{ "LSX", "lsx", DAV1D_LOONGARCH_CPU_FLAG_LSX },
{ "LASX", "lasx", DAV1D_LOONGARCH_CPU_FLAG_LASX },
#elif ARCH_PPC64LE
{ "VSX", "vsx", DAV1D_PPC_CPU_FLAG_VSX },
#elif ARCH_RISCV
{ "RVV", "rvv", DAV1D_RISCV_CPU_FLAG_V },
#endif