mirror of
https://github.com/mpv-player/mpv
synced 2024-08-04 14:59:58 +02:00
b135af6842
It seems this will be useful for Rokchip DRM hwcontext integration. DRM hwcontexts have additional internal structure which can be different depending on the decoder, and which is not part of the generic hwcontext API. Rockchip has 1 layer, which EGL interop happens to translate to a RGB texture, while VAAPI (mapped as DRM hwcontext) will use multiple layers. Both will use sw_format=nv12, and thus are indistinguishable on the mp_image_params level. But this is needed to initialize the EGL mapping and the vo_gpu video renderer correctly. We hope that the layer count is enough to tell whether EGL will translate the data to a RGB texture (vs. 2 texture resembling raw nv12 data). For that we introduce MP_IMAGE_HW_FLAG_OPAQUE. This commit adds the flag, infrastructure to set it, and an "example" for D3D11. The D3D11 addition is quite useless at this point. But later we want to get rid of d3d11_update_image_attribs() anyway, while we still need a way to force d3d11vpp filter insertion, so maybe it has some justification (who knows). In any case it makes testing this easier. Obviously it also adds some basic support for triggering the opaque format for decoding, which will use a driver-specific format, but which is not supported in shaders. The opaque flag is not used to determine whether d3d11vpp needs to be inserted, though.
111 lines
2.8 KiB
C
111 lines
2.8 KiB
C
#include <pthread.h>
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#include <assert.h>
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#include "config.h"
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#include "hwdec.h"
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struct mp_hwdec_devices {
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pthread_mutex_t lock;
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struct mp_hwdec_ctx *hwctx;
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void (*load_api)(void *ctx, enum hwdec_type type);
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void *load_api_ctx;
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};
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struct mp_hwdec_devices *hwdec_devices_create(void)
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{
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struct mp_hwdec_devices *devs = talloc_zero(NULL, struct mp_hwdec_devices);
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pthread_mutex_init(&devs->lock, NULL);
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return devs;
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}
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void hwdec_devices_destroy(struct mp_hwdec_devices *devs)
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{
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if (!devs)
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return;
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assert(!devs->hwctx); // must have been hwdec_devices_remove()ed
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assert(!devs->load_api); // must have been unset
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pthread_mutex_destroy(&devs->lock);
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talloc_free(devs);
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}
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struct mp_hwdec_ctx *hwdec_devices_get(struct mp_hwdec_devices *devs,
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enum hwdec_type type)
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{
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struct mp_hwdec_ctx *res = NULL;
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pthread_mutex_lock(&devs->lock);
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if (devs->hwctx && devs->hwctx->type == type)
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res = devs->hwctx;
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pthread_mutex_unlock(&devs->lock);
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return res;
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}
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struct mp_hwdec_ctx *hwdec_devices_get_first(struct mp_hwdec_devices *devs)
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{
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pthread_mutex_lock(&devs->lock);
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struct mp_hwdec_ctx *res = devs->hwctx;
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pthread_mutex_unlock(&devs->lock);
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return res;
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}
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void hwdec_devices_add(struct mp_hwdec_devices *devs, struct mp_hwdec_ctx *ctx)
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{
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pthread_mutex_lock(&devs->lock);
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// We support only 1 device; ignore the rest.
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if (!devs->hwctx)
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devs->hwctx = ctx;
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pthread_mutex_unlock(&devs->lock);
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}
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void hwdec_devices_remove(struct mp_hwdec_devices *devs, struct mp_hwdec_ctx *ctx)
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{
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pthread_mutex_lock(&devs->lock);
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if (devs->hwctx == ctx)
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devs->hwctx = NULL;
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pthread_mutex_unlock(&devs->lock);
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}
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void hwdec_devices_set_loader(struct mp_hwdec_devices *devs,
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void (*load_api)(void *ctx, enum hwdec_type type), void *load_api_ctx)
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{
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devs->load_api = load_api;
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devs->load_api_ctx = load_api_ctx;
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}
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void hwdec_devices_request(struct mp_hwdec_devices *devs, enum hwdec_type type)
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{
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if (devs->load_api && !hwdec_devices_get_first(devs))
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devs->load_api(devs->load_api_ctx, type);
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}
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void *hwdec_devices_load(struct mp_hwdec_devices *devs, enum hwdec_type type)
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{
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if (!devs)
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return NULL;
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hwdec_devices_request(devs, type);
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struct mp_hwdec_ctx *hwctx = hwdec_devices_get(devs, type);
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return hwctx ? hwctx->ctx : NULL;
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}
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#if HAVE_D3D_HWACCEL
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extern const struct hwcontext_fns hwcontext_fns_d3d11;
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#endif
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static const struct hwcontext_fns *const hwcontext_fns[] = {
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#if HAVE_D3D_HWACCEL
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&hwcontext_fns_d3d11,
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#endif
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NULL,
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};
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const struct hwcontext_fns *hwdec_get_hwcontext_fns(int av_hwdevice_type)
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{
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for (int n = 0; hwcontext_fns[n]; n++) {
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if (hwcontext_fns[n]->av_hwdevice_type == av_hwdevice_type)
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return hwcontext_fns[n];
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}
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return NULL;
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}
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