mirror of
https://github.com/mpv-player/mpv
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136 lines
4.5 KiB
C
136 lines
4.5 KiB
C
/*
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* Copyright (C) 2011-2014 Hendrik Leppkes
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* http://www.1f0.de
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Taken from the QuickSync decoder by Eric Gur
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*/
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#pragma GCC push_options
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#pragma GCC target("sse4.1")
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#include <smmintrin.h>
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#include <stdbool.h>
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#include <string.h>
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#include "gpu_memcpy.h"
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// gpu_memcpy is a memcpy style function that copied data very fast from a
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// GPU tiled memory (write back)
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// Performance tip: page offset (12 lsb) of both addresses should be different
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// optimally use a 2K offset between them.
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void *gpu_memcpy(void *restrict d, const void *restrict s, size_t size)
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{
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static const size_t regsInLoop = sizeof(size_t) * 2; // 8 or 16
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if (d == NULL || s == NULL) return NULL;
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// If memory is not aligned, use memcpy
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bool isAligned = (((size_t)(s) | (size_t)(d)) & 0xF) == 0;
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if (!isAligned)
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{
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return memcpy(d, s, size);
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}
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__m128i xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7;
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#ifdef __x86_64__
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__m128i xmm8, xmm9, xmm10, xmm11, xmm12, xmm13, xmm14, xmm15;
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#endif
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size_t reminder = size & (regsInLoop * sizeof(xmm0) - 1); // Copy 128 or 256 bytes every loop
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size_t end = 0;
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__m128i* pTrg = (__m128i*)d;
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__m128i* pTrgEnd = pTrg + ((size - reminder) >> 4);
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__m128i* pSrc = (__m128i*)s;
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// Make sure source is synced - doesn't hurt if not needed.
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_mm_sfence();
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while (pTrg < pTrgEnd)
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{
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// _mm_stream_load_si128 emits the Streaming SIMD Extensions 4 (SSE4.1) instruction MOVNTDQA
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// Fastest method for copying GPU RAM. Available since Penryn (45nm Core 2 Duo/Quad)
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xmm0 = _mm_stream_load_si128(pSrc);
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xmm1 = _mm_stream_load_si128(pSrc + 1);
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xmm2 = _mm_stream_load_si128(pSrc + 2);
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xmm3 = _mm_stream_load_si128(pSrc + 3);
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xmm4 = _mm_stream_load_si128(pSrc + 4);
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xmm5 = _mm_stream_load_si128(pSrc + 5);
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xmm6 = _mm_stream_load_si128(pSrc + 6);
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xmm7 = _mm_stream_load_si128(pSrc + 7);
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#ifdef __x86_64__ // Use all 16 xmm registers
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xmm8 = _mm_stream_load_si128(pSrc + 8);
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xmm9 = _mm_stream_load_si128(pSrc + 9);
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xmm10 = _mm_stream_load_si128(pSrc + 10);
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xmm11 = _mm_stream_load_si128(pSrc + 11);
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xmm12 = _mm_stream_load_si128(pSrc + 12);
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xmm13 = _mm_stream_load_si128(pSrc + 13);
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xmm14 = _mm_stream_load_si128(pSrc + 14);
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xmm15 = _mm_stream_load_si128(pSrc + 15);
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#endif
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pSrc += regsInLoop;
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// _mm_store_si128 emit the SSE2 instruction MOVDQA (aligned store)
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_mm_store_si128(pTrg , xmm0);
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_mm_store_si128(pTrg + 1, xmm1);
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_mm_store_si128(pTrg + 2, xmm2);
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_mm_store_si128(pTrg + 3, xmm3);
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_mm_store_si128(pTrg + 4, xmm4);
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_mm_store_si128(pTrg + 5, xmm5);
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_mm_store_si128(pTrg + 6, xmm6);
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_mm_store_si128(pTrg + 7, xmm7);
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#ifdef __x86_64__ // Use all 16 xmm registers
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_mm_store_si128(pTrg + 8, xmm8);
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_mm_store_si128(pTrg + 9, xmm9);
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_mm_store_si128(pTrg + 10, xmm10);
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_mm_store_si128(pTrg + 11, xmm11);
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_mm_store_si128(pTrg + 12, xmm12);
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_mm_store_si128(pTrg + 13, xmm13);
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_mm_store_si128(pTrg + 14, xmm14);
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_mm_store_si128(pTrg + 15, xmm15);
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#endif
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pTrg += regsInLoop;
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}
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// Copy in 16 byte steps
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if (reminder >= 16)
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{
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size = reminder;
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reminder = size & 15;
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end = size >> 4;
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for (size_t i = 0; i < end; ++i)
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{
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pTrg[i] = _mm_stream_load_si128(pSrc + i);
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}
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}
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// Copy last bytes - shouldn't happen as strides are modulu 16
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if (reminder)
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{
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__m128i temp = _mm_stream_load_si128(pSrc + end);
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char* ps = (char*)(&temp);
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char* pt = (char*)(pTrg + end);
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for (size_t i = 0; i < reminder; ++i)
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{
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pt[i] = ps[i];
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}
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}
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return d;
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}
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