mirror of https://github.com/mpv-player/mpv
Rip out 3DNOW support
Ancient AMD specific enhancement to the MMX instruction set. Officually discontinued by AMD. Note that support for this was already disabled in the previous commit. This commit removes the actual code.
This commit is contained in:
wm4
parent
74df1d8e05
commit
43da1e78c4
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@ -4695,7 +4695,6 @@ $def_ebx_available
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$(ff_config_enable "$arch_all" "$arch" "ARCH")
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$(ff_config_enable "$subarch_all" "$subarch" "ARCH")
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#define HAVE_AMD3DNOW 0
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#define HAVE_MMX ARCH_X86
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#define HAVE_MMX2 ARCH_X86
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#define HAVE_SSE ARCH_X86
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@ -35,8 +35,6 @@ typedef struct cpucaps_s {
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bool isX86;
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bool hasMMX;
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bool hasMMX2;
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bool has3DNow;
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bool has3DNowExt;
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bool hasSSE;
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bool hasSSE2;
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bool hasSSE3;
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@ -189,10 +189,6 @@ static int init(sh_audio_t *sh_audio)
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#endif
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if(gCpuCaps.hasMMX) a52_accel|=MM_ACCEL_X86_MMX;
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if(gCpuCaps.hasMMX2) a52_accel|=MM_ACCEL_X86_MMXEXT;
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if(gCpuCaps.has3DNow) a52_accel|=MM_ACCEL_X86_3DNOW;
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#ifdef MM_ACCEL_X86_3DNOWEXT
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if(gCpuCaps.has3DNowExt) a52_accel|=MM_ACCEL_X86_3DNOWEXT;
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#endif
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a52_state=a52_init (a52_accel);
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if (a52_state == NULL) {
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mp_msg(MSGT_DECAUDIO,MSGL_ERR,"A52 init failed\n");
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@ -455,9 +455,7 @@ void *decode_video(sh_video_t *sh_video, struct demux_packet *packet,
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#if HAVE_MMX
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// some codecs are broken, and doesn't restore MMX state :(
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// it happens usually with broken/damaged files.
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if (gCpuCaps.has3DNow) {
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__asm__ volatile("femms\n\t":::"memory");
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} else if (gCpuCaps.hasMMX) {
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if (gCpuCaps.hasMMX) {
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__asm__ volatile("emms\n\t":::"memory");
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}
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#endif
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@ -21,8 +21,6 @@
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#define PULLUP_CPU_MMX 1
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#define PULLUP_CPU_MMX2 2
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#define PULLUP_CPU_3DNOW 4
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#define PULLUP_CPU_3DNOWEXT 8
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#define PULLUP_CPU_SSE 16
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#define PULLUP_CPU_SSE2 32
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@ -445,23 +445,6 @@ block_metrics_faster_c(unsigned char *a, unsigned char *b, int as, int bs,
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); \
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} while (--lines);
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static inline struct metrics
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block_metrics_3dnow(unsigned char *a, unsigned char *b, int as, int bs,
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int lines, struct vf_priv_s *p, struct frame_stats *s)
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{
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struct metrics tm;
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#if !HAVE_AMD3DNOW
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mp_msg(MSGT_VFILTER, MSGL_FATAL, "block_metrics_3dnow: internal error\n");
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#else
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static const unsigned long long ones = 0x0101010101010101ull;
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BLOCK_METRICS_TEMPLATE();
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__asm__ volatile("movq %%mm7, %0\n\temms" : "=m" (tm));
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get_block_stats(&tm, p, s);
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#endif
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return tm;
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}
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#undef PSUMBW
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#undef PSADBW
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#undef PMAXUB
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@ -797,9 +780,6 @@ static void diff_planes(struct vf_priv_s *p, struct frame_stats *s,
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if (p->mmx2 == 1) {
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for (i = 0; i < w; i += 8)
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block_metrics_mmx2(of+i, nf+i, os, ns, 4, p, s);
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} else if (p->mmx2 == 2) {
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for (i = 0; i < w; i += 8)
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block_metrics_3dnow(of+i, nf+i, os, ns, 4, p, s);
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} else if (p->fast > 3) {
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for (i = 0; i < w; i += 8)
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block_metrics_faster_c(of+i, nf+i, os, ns, 4, p, s);
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@ -1426,7 +1406,7 @@ static int vf_open(vf_instance_t *vf, char *args)
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p->dint_thres = 4;
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p->luma_only = 0;
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p->fast = 3;
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p->mmx2 = gCpuCaps.hasMMX2 ? 1 : gCpuCaps.has3DNow ? 2 : 0;
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p->mmx2 = gCpuCaps.hasMMX2;
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if (args) {
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const char *args_remain = parse_args(p, args);
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if (args_remain) {
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@ -1444,9 +1424,6 @@ static int vf_open(vf_instance_t *vf, char *args)
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p->mmx2 = 0;
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#if !HAVE_MMX
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p->mmx2 = 0;
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#endif
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#if !HAVE_AMD3DNOW
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p->mmx2 &= 1;
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#endif
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p->thres.odd = p->thres.even;
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p->thres.temp = p->thres.noise;
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@ -49,8 +49,7 @@ static int config(struct vf_instance *vf,
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unsigned int voflags, unsigned int outfmt){
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int flags=
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(gCpuCaps.hasMMX ? PP_CPU_CAPS_MMX : 0)
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| (gCpuCaps.hasMMX2 ? PP_CPU_CAPS_MMX2 : 0)
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| (gCpuCaps.has3DNow ? PP_CPU_CAPS_3DNOW : 0);
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| (gCpuCaps.hasMMX2 ? PP_CPU_CAPS_MMX2 : 0);
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switch(outfmt){
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case IMGFMT_444P: flags|= PP_FORMAT_444; break;
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@ -66,8 +66,6 @@ static void init_pullup(struct vf_instance *vf, mp_image_t *mpi)
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if (gCpuCaps.hasMMX) c->cpu |= PULLUP_CPU_MMX;
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if (gCpuCaps.hasMMX2) c->cpu |= PULLUP_CPU_MMX2;
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if (gCpuCaps.has3DNow) c->cpu |= PULLUP_CPU_3DNOW;
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if (gCpuCaps.has3DNowExt) c->cpu |= PULLUP_CPU_3DNOWEXT;
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if (gCpuCaps.hasSSE) c->cpu |= PULLUP_CPU_SSE;
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if (gCpuCaps.hasSSE2) c->cpu |= PULLUP_CPU_SSE2;
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@ -661,8 +661,7 @@ float sws_lum_sharpen= 0.0;
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int get_sws_cpuflags(void){
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return
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(gCpuCaps.hasMMX ? SWS_CPU_CAPS_MMX : 0)
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| (gCpuCaps.hasMMX2 ? SWS_CPU_CAPS_MMX2 : 0)
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| (gCpuCaps.has3DNow ? SWS_CPU_CAPS_3DNOW : 0);
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| (gCpuCaps.hasMMX2 ? SWS_CPU_CAPS_MMX2 : 0);
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}
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void sws_getFlagsAndFilterFromCmdLine(int *flags, SwsFilter **srcFilterParam, SwsFilter **dstFilterParam)
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@ -71,42 +71,6 @@ static void deint(unsigned char *dest, int ds, unsigned char *src, int ss, int w
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fast_memcpy(dest, src, w);
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}
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#if HAVE_AMD3DNOW
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static void qpel_li_3DNOW(unsigned char *d, unsigned char *s, int w, int h, int ds, int ss, int up)
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{
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int i, j, ssd=ss;
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long crap1, crap2;
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if (up) {
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ssd = -ss;
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fast_memcpy(d, s, w);
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d += ds;
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s += ss;
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}
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for (i=h-1; i; i--) {
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__asm__ volatile(
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"1: \n\t"
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"movq (%%"REG_S"), %%mm0 \n\t"
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"movq (%%"REG_S",%%"REG_a"), %%mm1 \n\t"
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"pavgusb %%mm0, %%mm1 \n\t"
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"add $8, %%"REG_S" \n\t"
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"pavgusb %%mm0, %%mm1 \n\t"
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"movq %%mm1, (%%"REG_D") \n\t"
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"add $8, %%"REG_D" \n\t"
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"decl %%ecx \n\t"
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"jnz 1b \n\t"
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: "=S"(crap1), "=D"(crap2)
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: "c"(w>>3), "S"(s), "D"(d), "a"((long)ssd)
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);
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for (j=w-(w&7); j<w; j++)
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d[j] = (s[j+ssd] + 3*s[j])>>2;
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d += ds;
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s += ss;
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}
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if (!up) fast_memcpy(d, s, w);
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__asm__ volatile("emms \n\t" : : : "memory");
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}
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#endif
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#if HAVE_MMX2
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static void qpel_li_MMX2(unsigned char *d, unsigned char *s, int w, int h, int ds, int ss, int up)
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{
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@ -498,9 +462,6 @@ static int vf_open(vf_instance_t *vf, char *args)
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#endif
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#if HAVE_MMX2
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if(gCpuCaps.hasMMX2) qpel_li = qpel_li_MMX2;
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#endif
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#if HAVE_AMD3DNOW
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if(gCpuCaps.has3DNow) qpel_li = qpel_li_3DNOW;
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#endif
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return 1;
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}
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134
libvo/osd.c
134
libvo/osd.c
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@ -36,46 +36,29 @@ static const unsigned long long mask24lh __attribute__((aligned(8))) = 0xFFFF00
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static const unsigned long long mask24hl __attribute__((aligned(8))) = 0x0000FFFFFFFFFFFFULL;
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#endif
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#define CONFIG_RUNTIME_CPUDETECT 1
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//Note: we have C, X86-nommx, MMX, MMX2, 3DNOW version therse no 3DNOW+MMX2 one
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//Note: we have C, X86-nommx, MMX, MMX2
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//Plain C versions
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#if !HAVE_MMX || CONFIG_RUNTIME_CPUDETECT
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#define COMPILE_C
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#endif
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#if ARCH_X86
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#if (HAVE_MMX && !HAVE_AMD3DNOW && !HAVE_MMX2) || CONFIG_RUNTIME_CPUDETECT
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#define COMPILE_MMX
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#endif
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#if HAVE_MMX2 || CONFIG_RUNTIME_CPUDETECT
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#define COMPILE_MMX2
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#endif
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#if (HAVE_AMD3DNOW && !HAVE_MMX2) || CONFIG_RUNTIME_CPUDETECT
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#define COMPILE_3DNOW
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#endif
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#endif /* ARCH_X86 */
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#undef HAVE_MMX
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#undef HAVE_MMX2
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#undef HAVE_AMD3DNOW
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#define HAVE_MMX 0
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#define HAVE_MMX2 0
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#define HAVE_AMD3DNOW 0
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#if ! ARCH_X86
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#ifdef COMPILE_C
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#undef HAVE_MMX
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#undef HAVE_MMX2
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#undef HAVE_AMD3DNOW
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#define HAVE_MMX 0
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#define HAVE_MMX2 0
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#define HAVE_AMD3DNOW 0
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#define RENAME(a) a ## _C
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#include "osd_template.c"
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#endif
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@ -87,10 +70,8 @@ static const unsigned long long mask24hl __attribute__((aligned(8))) = 0x0000FF
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#undef RENAME
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#undef HAVE_MMX
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#undef HAVE_MMX2
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#undef HAVE_AMD3DNOW
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#define HAVE_MMX 0
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#define HAVE_MMX2 0
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#define HAVE_AMD3DNOW 0
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#define RENAME(a) a ## _X86
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#include "osd_template.c"
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#endif
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@ -100,10 +81,8 @@ static const unsigned long long mask24hl __attribute__((aligned(8))) = 0x0000FF
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#undef RENAME
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#undef HAVE_MMX
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#undef HAVE_MMX2
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#undef HAVE_AMD3DNOW
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#define HAVE_MMX 1
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#define HAVE_MMX2 0
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#define HAVE_AMD3DNOW 0
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#define RENAME(a) a ## _MMX
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#include "osd_template.c"
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#endif
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@ -113,37 +92,19 @@ static const unsigned long long mask24hl __attribute__((aligned(8))) = 0x0000FF
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#undef RENAME
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#undef HAVE_MMX
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#undef HAVE_MMX2
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#undef HAVE_AMD3DNOW
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#define HAVE_MMX 1
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#define HAVE_MMX2 1
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#define HAVE_AMD3DNOW 0
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#define RENAME(a) a ## _MMX2
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#include "osd_template.c"
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#endif
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//3DNOW versions
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#ifdef COMPILE_3DNOW
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#undef RENAME
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#undef HAVE_MMX
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#undef HAVE_MMX2
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#undef HAVE_AMD3DNOW
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#define HAVE_MMX 1
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#define HAVE_MMX2 0
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#define HAVE_AMD3DNOW 1
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#define RENAME(a) a ## _3DNow
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#include "osd_template.c"
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#endif
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#endif /* ARCH_X86 */
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void vo_draw_alpha_yv12(int w,int h, unsigned char* src, unsigned char *srca, int srcstride, unsigned char* dstbase,int dststride){
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#if CONFIG_RUNTIME_CPUDETECT
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#if ARCH_X86
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// ordered by speed / fastest first
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if(gCpuCaps.hasMMX2)
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vo_draw_alpha_yv12_MMX2(w, h, src, srca, srcstride, dstbase, dststride);
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else if(gCpuCaps.has3DNow)
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vo_draw_alpha_yv12_3DNow(w, h, src, srca, srcstride, dstbase, dststride);
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else if(gCpuCaps.hasMMX)
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vo_draw_alpha_yv12_MMX(w, h, src, srca, srcstride, dstbase, dststride);
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else
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@ -151,29 +112,13 @@ void vo_draw_alpha_yv12(int w,int h, unsigned char* src, unsigned char *srca, in
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#else
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vo_draw_alpha_yv12_C(w, h, src, srca, srcstride, dstbase, dststride);
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#endif
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#else //CONFIG_RUNTIME_CPUDETECT
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#if HAVE_MMX2
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vo_draw_alpha_yv12_MMX2(w, h, src, srca, srcstride, dstbase, dststride);
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#elif HAVE_AMD3DNOW
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vo_draw_alpha_yv12_3DNow(w, h, src, srca, srcstride, dstbase, dststride);
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#elif HAVE_MMX
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vo_draw_alpha_yv12_MMX(w, h, src, srca, srcstride, dstbase, dststride);
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#elif ARCH_X86
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vo_draw_alpha_yv12_X86(w, h, src, srca, srcstride, dstbase, dststride);
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#else
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vo_draw_alpha_yv12_C(w, h, src, srca, srcstride, dstbase, dststride);
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#endif
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#endif //!CONFIG_RUNTIME_CPUDETECT
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}
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void vo_draw_alpha_yuy2(int w,int h, unsigned char* src, unsigned char *srca, int srcstride, unsigned char* dstbase,int dststride){
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#if CONFIG_RUNTIME_CPUDETECT
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#if ARCH_X86
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// ordered by speed / fastest first
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if(gCpuCaps.hasMMX2)
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vo_draw_alpha_yuy2_MMX2(w, h, src, srca, srcstride, dstbase, dststride);
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else if(gCpuCaps.has3DNow)
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vo_draw_alpha_yuy2_3DNow(w, h, src, srca, srcstride, dstbase, dststride);
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else if(gCpuCaps.hasMMX)
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vo_draw_alpha_yuy2_MMX(w, h, src, srca, srcstride, dstbase, dststride);
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else
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@ -181,29 +126,13 @@ void vo_draw_alpha_yuy2(int w,int h, unsigned char* src, unsigned char *srca, in
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#else
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vo_draw_alpha_yuy2_C(w, h, src, srca, srcstride, dstbase, dststride);
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#endif
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#else //CONFIG_RUNTIME_CPUDETECT
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#if HAVE_MMX2
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vo_draw_alpha_yuy2_MMX2(w, h, src, srca, srcstride, dstbase, dststride);
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#elif HAVE_AMD3DNOW
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vo_draw_alpha_yuy2_3DNow(w, h, src, srca, srcstride, dstbase, dststride);
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#elif HAVE_MMX
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vo_draw_alpha_yuy2_MMX(w, h, src, srca, srcstride, dstbase, dststride);
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#elif ARCH_X86
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vo_draw_alpha_yuy2_X86(w, h, src, srca, srcstride, dstbase, dststride);
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#else
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vo_draw_alpha_yuy2_C(w, h, src, srca, srcstride, dstbase, dststride);
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#endif
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#endif //!CONFIG_RUNTIME_CPUDETECT
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}
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void vo_draw_alpha_uyvy(int w,int h, unsigned char* src, unsigned char *srca, int srcstride, unsigned char* dstbase,int dststride){
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#if CONFIG_RUNTIME_CPUDETECT
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#if ARCH_X86
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// ordered by speed / fastest first
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if(gCpuCaps.hasMMX2)
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vo_draw_alpha_uyvy_MMX2(w, h, src, srca, srcstride, dstbase, dststride);
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else if(gCpuCaps.has3DNow)
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vo_draw_alpha_uyvy_3DNow(w, h, src, srca, srcstride, dstbase, dststride);
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else if(gCpuCaps.hasMMX)
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vo_draw_alpha_uyvy_MMX(w, h, src, srca, srcstride, dstbase, dststride);
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else
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@ -211,29 +140,13 @@ void vo_draw_alpha_uyvy(int w,int h, unsigned char* src, unsigned char *srca, in
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#else
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vo_draw_alpha_uyvy_C(w, h, src, srca, srcstride, dstbase, dststride);
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#endif
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#else //CONFIG_RUNTIME_CPUDETECT
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#if HAVE_MMX2
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vo_draw_alpha_uyvy_MMX2(w, h, src, srca, srcstride, dstbase, dststride);
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#elif HAVE_AMD3DNOW
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vo_draw_alpha_uyvy_3DNow(w, h, src, srca, srcstride, dstbase, dststride);
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#elif HAVE_MMX
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vo_draw_alpha_uyvy_MMX(w, h, src, srca, srcstride, dstbase, dststride);
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#elif ARCH_X86
|
||||
vo_draw_alpha_uyvy_X86(w, h, src, srca, srcstride, dstbase, dststride);
|
||||
#else
|
||||
vo_draw_alpha_uyvy_C(w, h, src, srca, srcstride, dstbase, dststride);
|
||||
#endif
|
||||
#endif //!CONFIG_RUNTIME_CPUDETECT
|
||||
}
|
||||
|
||||
void vo_draw_alpha_rgb24(int w,int h, unsigned char* src, unsigned char *srca, int srcstride, unsigned char* dstbase,int dststride){
|
||||
#if CONFIG_RUNTIME_CPUDETECT
|
||||
#if ARCH_X86
|
||||
// ordered by speed / fastest first
|
||||
if(gCpuCaps.hasMMX2)
|
||||
vo_draw_alpha_rgb24_MMX2(w, h, src, srca, srcstride, dstbase, dststride);
|
||||
else if(gCpuCaps.has3DNow)
|
||||
vo_draw_alpha_rgb24_3DNow(w, h, src, srca, srcstride, dstbase, dststride);
|
||||
else if(gCpuCaps.hasMMX)
|
||||
vo_draw_alpha_rgb24_MMX(w, h, src, srca, srcstride, dstbase, dststride);
|
||||
else
|
||||
|
|
@ -241,29 +154,13 @@ void vo_draw_alpha_rgb24(int w,int h, unsigned char* src, unsigned char *srca, i
|
|||
#else
|
||||
vo_draw_alpha_rgb24_C(w, h, src, srca, srcstride, dstbase, dststride);
|
||||
#endif
|
||||
#else //CONFIG_RUNTIME_CPUDETECT
|
||||
#if HAVE_MMX2
|
||||
vo_draw_alpha_rgb24_MMX2(w, h, src, srca, srcstride, dstbase, dststride);
|
||||
#elif HAVE_AMD3DNOW
|
||||
vo_draw_alpha_rgb24_3DNow(w, h, src, srca, srcstride, dstbase, dststride);
|
||||
#elif HAVE_MMX
|
||||
vo_draw_alpha_rgb24_MMX(w, h, src, srca, srcstride, dstbase, dststride);
|
||||
#elif ARCH_X86
|
||||
vo_draw_alpha_rgb24_X86(w, h, src, srca, srcstride, dstbase, dststride);
|
||||
#else
|
||||
vo_draw_alpha_rgb24_C(w, h, src, srca, srcstride, dstbase, dststride);
|
||||
#endif
|
||||
#endif //!CONFIG_RUNTIME_CPUDETECT
|
||||
}
|
||||
|
||||
void vo_draw_alpha_rgb32(int w,int h, unsigned char* src, unsigned char *srca, int srcstride, unsigned char* dstbase,int dststride){
|
||||
#if CONFIG_RUNTIME_CPUDETECT
|
||||
#if ARCH_X86
|
||||
// ordered by speed / fastest first
|
||||
if(gCpuCaps.hasMMX2)
|
||||
vo_draw_alpha_rgb32_MMX2(w, h, src, srca, srcstride, dstbase, dststride);
|
||||
else if(gCpuCaps.has3DNow)
|
||||
vo_draw_alpha_rgb32_3DNow(w, h, src, srca, srcstride, dstbase, dststride);
|
||||
else if(gCpuCaps.hasMMX)
|
||||
vo_draw_alpha_rgb32_MMX(w, h, src, srca, srcstride, dstbase, dststride);
|
||||
else
|
||||
|
|
@ -271,19 +168,6 @@ void vo_draw_alpha_rgb32(int w,int h, unsigned char* src, unsigned char *srca, i
|
|||
#else
|
||||
vo_draw_alpha_rgb32_C(w, h, src, srca, srcstride, dstbase, dststride);
|
||||
#endif
|
||||
#else //CONFIG_RUNTIME_CPUDETECT
|
||||
#if HAVE_MMX2
|
||||
vo_draw_alpha_rgb32_MMX2(w, h, src, srca, srcstride, dstbase, dststride);
|
||||
#elif HAVE_AMD3DNOW
|
||||
vo_draw_alpha_rgb32_3DNow(w, h, src, srca, srcstride, dstbase, dststride);
|
||||
#elif HAVE_MMX
|
||||
vo_draw_alpha_rgb32_MMX(w, h, src, srca, srcstride, dstbase, dststride);
|
||||
#elif ARCH_X86
|
||||
vo_draw_alpha_rgb32_X86(w, h, src, srca, srcstride, dstbase, dststride);
|
||||
#else
|
||||
vo_draw_alpha_rgb32_C(w, h, src, srca, srcstride, dstbase, dststride);
|
||||
#endif
|
||||
#endif //!CONFIG_RUNTIME_CPUDETECT
|
||||
}
|
||||
|
||||
#ifdef FAST_OSD_TABLE
|
||||
|
|
@ -304,13 +188,10 @@ void vo_draw_alpha_init(void){
|
|||
//FIXME the optimized stuff is a lie for 15/16bpp as they aren't optimized yet
|
||||
if( mp_msg_test(MSGT_OSD,MSGL_V) )
|
||||
{
|
||||
#if CONFIG_RUNTIME_CPUDETECT
|
||||
#if ARCH_X86
|
||||
// ordered per speed fasterst first
|
||||
if(gCpuCaps.hasMMX2)
|
||||
mp_msg(MSGT_OSD,MSGL_INFO,"Using MMX (with tiny bit MMX2) Optimized OnScreenDisplay\n");
|
||||
else if(gCpuCaps.has3DNow)
|
||||
mp_msg(MSGT_OSD,MSGL_INFO,"Using MMX (with tiny bit 3DNow) Optimized OnScreenDisplay\n");
|
||||
else if(gCpuCaps.hasMMX)
|
||||
mp_msg(MSGT_OSD,MSGL_INFO,"Using MMX Optimized OnScreenDisplay\n");
|
||||
else
|
||||
|
|
@ -318,19 +199,6 @@ void vo_draw_alpha_init(void){
|
|||
#else
|
||||
mp_msg(MSGT_OSD,MSGL_INFO,"Using Unoptimized OnScreenDisplay\n");
|
||||
#endif
|
||||
#else //CONFIG_RUNTIME_CPUDETECT
|
||||
#if HAVE_MMX2
|
||||
mp_msg(MSGT_OSD,MSGL_INFO,"Using MMX (with tiny bit MMX2) Optimized OnScreenDisplay\n");
|
||||
#elif HAVE_AMD3DNOW
|
||||
mp_msg(MSGT_OSD,MSGL_INFO,"Using MMX (with tiny bit 3DNow) Optimized OnScreenDisplay\n");
|
||||
#elif HAVE_MMX
|
||||
mp_msg(MSGT_OSD,MSGL_INFO,"Using MMX Optimized OnScreenDisplay\n");
|
||||
#elif ARCH_X86
|
||||
mp_msg(MSGT_OSD,MSGL_INFO,"Using X86 Optimized OnScreenDisplay\n");
|
||||
#else
|
||||
mp_msg(MSGT_OSD,MSGL_INFO,"Using Unoptimized OnScreenDisplay\n");
|
||||
#endif
|
||||
#endif //!CONFIG_RUNTIME_CPUDETECT
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -24,11 +24,7 @@
|
|||
#undef PREFETCHW
|
||||
#undef PAVGB
|
||||
|
||||
#if HAVE_AMD3DNOW
|
||||
#define PREFETCH "prefetch"
|
||||
#define PREFETCHW "prefetchw"
|
||||
#define PAVGB "pavgusb"
|
||||
#elif HAVE_MMX2
|
||||
#if HAVE_MMX2
|
||||
#define PREFETCH "prefetchnta"
|
||||
#define PREFETCHW "prefetcht0"
|
||||
#define PAVGB "pavgb"
|
||||
|
|
@ -37,12 +33,7 @@
|
|||
#define PREFETCHW " # nop"
|
||||
#endif
|
||||
|
||||
#if HAVE_AMD3DNOW
|
||||
/* On K6 femms is faster of emms. On K7 femms is directly mapped on emms. */
|
||||
#define EMMS "femms"
|
||||
#else
|
||||
#define EMMS "emms"
|
||||
#endif
|
||||
|
||||
static inline void RENAME(vo_draw_alpha_yv12)(int w,int h, unsigned char* src, unsigned char *srca, int srcstride, unsigned char* dstbase,int dststride){
|
||||
int y;
|
||||
|
|
@ -324,12 +315,6 @@ static inline void RENAME(vo_draw_alpha_rgb32)(int w,int h, unsigned char* src,
|
|||
dstbase++;
|
||||
#endif
|
||||
#if HAVE_MMX
|
||||
#if HAVE_AMD3DNOW
|
||||
__asm__ volatile(
|
||||
"pxor %%mm7, %%mm7\n\t"
|
||||
"pcmpeqb %%mm6, %%mm6\n\t" // F..F
|
||||
::);
|
||||
#else /* HAVE_AMD3DNOW */
|
||||
__asm__ volatile(
|
||||
"pxor %%mm7, %%mm7\n\t"
|
||||
"pcmpeqb %%mm5, %%mm5\n\t" // F..F
|
||||
|
|
@ -337,48 +322,11 @@ static inline void RENAME(vo_draw_alpha_rgb32)(int w,int h, unsigned char* src,
|
|||
"psllw $8, %%mm5\n\t" //FF00FF00FF00
|
||||
"psrlw $8, %%mm4\n\t" //00FF00FF00FF
|
||||
::);
|
||||
#endif /* HAVE_AMD3DNOW */
|
||||
#endif /* HAVE_MMX */
|
||||
for(y=0;y<h;y++){
|
||||
register int x;
|
||||
#if ARCH_X86 && (!ARCH_X86_64 || HAVE_MMX)
|
||||
#if HAVE_MMX
|
||||
#if HAVE_AMD3DNOW
|
||||
__asm__ volatile(
|
||||
PREFETCHW" %0\n\t"
|
||||
PREFETCH" %1\n\t"
|
||||
PREFETCH" %2\n\t"
|
||||
::"m"(*dstbase),"m"(*srca),"m"(*src):"memory");
|
||||
for(x=0;x<w;x+=2){
|
||||
if(srca[x] || srca[x+1])
|
||||
__asm__ volatile(
|
||||
PREFETCHW" 32%0\n\t"
|
||||
PREFETCH" 32%1\n\t"
|
||||
PREFETCH" 32%2\n\t"
|
||||
"movq %0, %%mm0\n\t" // dstbase
|
||||
"movq %%mm0, %%mm1\n\t"
|
||||
"punpcklbw %%mm7, %%mm0\n\t"
|
||||
"punpckhbw %%mm7, %%mm1\n\t"
|
||||
"movd %1, %%mm2\n\t" // srca ABCD0000
|
||||
"paddb %%mm6, %%mm2\n\t"
|
||||
"punpcklbw %%mm2, %%mm2\n\t" // srca AABBCCDD
|
||||
"punpcklbw %%mm2, %%mm2\n\t" // srca AAAABBBB
|
||||
"movq %%mm2, %%mm3\n\t"
|
||||
"punpcklbw %%mm7, %%mm2\n\t" // srca 0A0A0A0A
|
||||
"punpckhbw %%mm7, %%mm3\n\t" // srca 0B0B0B0B
|
||||
"pmullw %%mm2, %%mm0\n\t"
|
||||
"pmullw %%mm3, %%mm1\n\t"
|
||||
"psrlw $8, %%mm0\n\t"
|
||||
"psrlw $8, %%mm1\n\t"
|
||||
"packuswb %%mm1, %%mm0\n\t"
|
||||
"movd %2, %%mm2 \n\t" // src ABCD0000
|
||||
"punpcklbw %%mm2, %%mm2\n\t" // src AABBCCDD
|
||||
"punpcklbw %%mm2, %%mm2\n\t" // src AAAABBBB
|
||||
"paddb %%mm2, %%mm0\n\t"
|
||||
"movq %%mm0, %0\n\t"
|
||||
:: "m" (dstbase[4*x]), "m" (srca[x]), "m" (src[x]));
|
||||
}
|
||||
#else //this is faster for intels crap
|
||||
__asm__ volatile(
|
||||
PREFETCHW" %0\n\t"
|
||||
PREFETCH" %1\n\t"
|
||||
|
|
@ -430,7 +378,6 @@ static inline void RENAME(vo_draw_alpha_rgb32)(int w,int h, unsigned char* src,
|
|||
:: "m" (dstbase[4*x]), "m" (srca[x]), "m" (src[x]), "m" (bFF)
|
||||
: "%eax");
|
||||
}
|
||||
#endif
|
||||
#else /* HAVE_MMX */
|
||||
for(x=0;x<w;x++){
|
||||
if(srca[x]){
|
||||
|
|
|
|||
|
|
@ -1020,8 +1020,6 @@ static void WINAPI expGetSystemInfo(SYSTEM_INFO* si)
|
|||
PF[PF_XMMI_INSTRUCTIONS_AVAILABLE] = TRUE;
|
||||
if (gCpuCaps.hasSSE2)
|
||||
PF[PF_XMMI64_INSTRUCTIONS_AVAILABLE] = TRUE;
|
||||
if (gCpuCaps.has3DNow)
|
||||
PF[PF_AMD3D_INSTRUCTIONS_AVAILABLE] = TRUE;
|
||||
|
||||
cachedsi.dwProcessorType = PROCESSOR_INTEL_PENTIUM;
|
||||
cachedsi.wProcessorLevel = 5;
|
||||
|
|
|
|||
Loading…
Reference in New Issue