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https://github.com/hashcat/hashcat
synced 2024-11-28 05:21:38 +01:00
Use -flegacy-pass-manager for -m 501, -m 1600 and -m 6300 on AMD HIP for massive speed improvement
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16d5beb1a6
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@ -8389,7 +8389,7 @@ static bool load_kernel (hashcat_ctx_t *hashcat_ctx, hc_device_param_t *device_p
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hiprtc_options[1] = "-nocudainc";
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hiprtc_options[2] = "-nocudalib";
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hiprtc_options[3] = "";
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hiprtc_options[3] = "-flegacy-pass-manager";
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hiprtc_options[4] = "";
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// untested but it should work
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@ -59,6 +59,19 @@ u64 module_tmp_size (MAYBE_UNUSED const hashconfig_t *hashconfig, MAYBE_UNUSED c
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return tmp_size;
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}
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char *module_jit_build_options (MAYBE_UNUSED const hashconfig_t *hashconfig, MAYBE_UNUSED const user_options_t *user_options, MAYBE_UNUSED const user_options_extra_t *user_options_extra, MAYBE_UNUSED const hashes_t *hashes, MAYBE_UNUSED const hc_device_param_t *device_param)
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{
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char *jit_build_options = NULL;
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// AMD HIP
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if (device_param->opencl_device_vendor_id == VENDOR_ID_AMD_USE_HIP)
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{
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hc_asprintf (&jit_build_options, "-flegacy-pass-manager");
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}
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return jit_build_options;
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}
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static void AES128_decrypt_cbc (const u32 key[4], const u32 iv[4], const u32 in[16], u32 out[16])
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{
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AES_KEY skey;
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@ -370,7 +383,7 @@ void module_init (module_ctx_t *module_ctx)
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module_ctx->module_hook23 = MODULE_DEFAULT;
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module_ctx->module_hook_salt_size = MODULE_DEFAULT;
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module_ctx->module_hook_size = MODULE_DEFAULT;
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module_ctx->module_jit_build_options = MODULE_DEFAULT;
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module_ctx->module_jit_build_options = module_jit_build_options;
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module_ctx->module_jit_cache_disable = MODULE_DEFAULT;
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module_ctx->module_kernel_accel_max = MODULE_DEFAULT;
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module_ctx->module_kernel_accel_min = MODULE_DEFAULT;
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@ -57,6 +57,19 @@ u64 module_tmp_size (MAYBE_UNUSED const hashconfig_t *hashconfig, MAYBE_UNUSED c
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return tmp_size;
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}
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char *module_jit_build_options (MAYBE_UNUSED const hashconfig_t *hashconfig, MAYBE_UNUSED const user_options_t *user_options, MAYBE_UNUSED const user_options_extra_t *user_options_extra, MAYBE_UNUSED const hashes_t *hashes, MAYBE_UNUSED const hc_device_param_t *device_param)
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{
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char *jit_build_options = NULL;
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// AMD HIP
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if (device_param->opencl_device_vendor_id == VENDOR_ID_AMD_USE_HIP)
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{
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hc_asprintf (&jit_build_options, "-flegacy-pass-manager");
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}
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return jit_build_options;
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}
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static void md5crypt_decode (u8 digest[16], const u8 buf[22])
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{
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int l;
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@ -291,7 +304,7 @@ void module_init (module_ctx_t *module_ctx)
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module_ctx->module_hook23 = MODULE_DEFAULT;
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module_ctx->module_hook_salt_size = MODULE_DEFAULT;
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module_ctx->module_hook_size = MODULE_DEFAULT;
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module_ctx->module_jit_build_options = MODULE_DEFAULT;
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module_ctx->module_jit_build_options = module_jit_build_options;
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module_ctx->module_jit_cache_disable = MODULE_DEFAULT;
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module_ctx->module_kernel_accel_max = MODULE_DEFAULT;
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module_ctx->module_kernel_accel_min = MODULE_DEFAULT;
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@ -57,6 +57,19 @@ u64 module_tmp_size (MAYBE_UNUSED const hashconfig_t *hashconfig, MAYBE_UNUSED c
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return tmp_size;
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}
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char *module_jit_build_options (MAYBE_UNUSED const hashconfig_t *hashconfig, MAYBE_UNUSED const user_options_t *user_options, MAYBE_UNUSED const user_options_extra_t *user_options_extra, MAYBE_UNUSED const hashes_t *hashes, MAYBE_UNUSED const hc_device_param_t *device_param)
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{
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char *jit_build_options = NULL;
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// AMD HIP
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if (device_param->opencl_device_vendor_id == VENDOR_ID_AMD_USE_HIP)
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{
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hc_asprintf (&jit_build_options, "-flegacy-pass-manager");
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}
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return jit_build_options;
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}
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static void md5crypt_decode (u8 digest[16], const u8 buf[22])
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{
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int l;
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@ -282,7 +295,7 @@ void module_init (module_ctx_t *module_ctx)
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module_ctx->module_hook23 = MODULE_DEFAULT;
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module_ctx->module_hook_salt_size = MODULE_DEFAULT;
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module_ctx->module_hook_size = MODULE_DEFAULT;
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module_ctx->module_jit_build_options = MODULE_DEFAULT;
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module_ctx->module_jit_build_options = module_jit_build_options;
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module_ctx->module_jit_cache_disable = MODULE_DEFAULT;
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module_ctx->module_kernel_accel_max = MODULE_DEFAULT;
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module_ctx->module_kernel_accel_min = MODULE_DEFAULT;
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