2015-12-04 15:47:52 +01:00
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/**
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2016-02-02 01:14:33 +01:00
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* Authors.....: Jens Steube <jens.steube@gmail.com>
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* Gabriele Gristina <matrix@hashcat.net>
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2016-02-16 16:42:08 +01:00
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* magnum <john.magnum@hushmail.com>
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2016-02-02 01:14:33 +01:00
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*
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2015-12-04 15:47:52 +01:00
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* License.....: MIT
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*/
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#ifndef EXT_NVML_H
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#define EXT_NVML_H
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2016-01-20 20:55:09 +01:00
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#if defined(HAVE_HWMON) && defined(HAVE_NVML)
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2015-12-04 15:47:52 +01:00
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#include <common.h>
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2016-01-27 13:47:19 +01:00
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/**
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* Declarations from nvml.h
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*/
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typedef struct nvmlDevice_st* nvmlDevice_t;
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typedef struct nvmlPciInfo_st {
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char busId[16];
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unsigned int domain;
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unsigned int bus;
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unsigned int device;
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unsigned int pciDeviceId;
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unsigned int pciSubSystemId;
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} nvmlPciInfo_t;
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typedef struct nvmlUtilization_st {
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unsigned int gpu; // GPU kernel execution last second, percent
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unsigned int memory; // GPU memory read/write last second, percent
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} nvmlUtilization_t;
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typedef enum nvmlTemperatureSensors_enum {
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NVML_TEMPERATURE_GPU = 0 // Temperature sensor for the GPU die
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} nvmlTemperatureSensors_t;
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typedef enum nvmlReturn_enum {
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NVML_SUCCESS = 0, // The operation was successful
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NVML_ERROR_UNINITIALIZED = 1, // NVML was not first initialized with nvmlInit()
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NVML_ERROR_INVALID_ARGUMENT = 2, // A supplied argument is invalid
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NVML_ERROR_NOT_SUPPORTED = 3, // The requested operation is not available on target device
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NVML_ERROR_NO_PERMISSION = 4, // The current user does not have permission for operation
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NVML_ERROR_ALREADY_INITIALIZED = 5, // Deprecated: Multiple initializations are now allowed through ref counting
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NVML_ERROR_NOT_FOUND = 6, // A query to find an object was unsuccessful
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NVML_ERROR_INSUFFICIENT_SIZE = 7, // An input argument is not large enough
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NVML_ERROR_INSUFFICIENT_POWER = 8, // A device's external power cables are not properly attached
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NVML_ERROR_DRIVER_NOT_LOADED = 9, // NVIDIA driver is not loaded
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NVML_ERROR_TIMEOUT = 10, // User provided timeout passed
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NVML_ERROR_UNKNOWN = 999 // An internal driver error occurred
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} nvmlReturn_t;
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2016-05-28 16:49:23 +02:00
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typedef enum nvmlClockType_enum {
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NVML_CLOCK_GRAPHICS = 0,
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NVML_CLOCK_SM = 1,
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NVML_CLOCK_MEM = 2
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} nvmlClockType_t;
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2016-05-29 00:59:24 +02:00
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typedef enum nvmlTemperatureThresholds_enum
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{
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NVML_TEMPERATURE_THRESHOLD_SHUTDOWN = 0, // Temperature at which the GPU will shut down
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// for HW protection
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NVML_TEMPERATURE_THRESHOLD_SLOWDOWN = 1, // Temperature at which the GPU will begin slowdown
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// Keep this last
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NVML_TEMPERATURE_THRESHOLD_COUNT
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} nvmlTemperatureThresholds_t;
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2016-01-27 13:47:19 +01:00
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/*
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* End of declarations from nvml.h
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**/
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2015-12-04 15:47:52 +01:00
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2015-12-15 18:41:11 +01:00
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typedef nvmlDevice_t HM_ADAPTER_NV;
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2015-12-04 15:47:52 +01:00
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2016-02-02 01:14:33 +01:00
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#include <shared.h>
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2015-12-15 20:34:07 +01:00
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typedef const char * (*NVML_ERROR_STRING) (nvmlReturn_t);
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2016-02-02 01:14:33 +01:00
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typedef int (*NVML_INIT) (void);
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typedef int (*NVML_SHUTDOWN) (void);
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2015-12-15 20:34:07 +01:00
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typedef nvmlReturn_t (*NVML_DEVICE_GET_NAME) (nvmlDevice_t, char *, unsigned int);
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typedef nvmlReturn_t (*NVML_DEVICE_GET_HANDLE_BY_INDEX) (unsigned int, nvmlDevice_t *);
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typedef nvmlReturn_t (*NVML_DEVICE_GET_TEMPERATURE) (nvmlDevice_t, nvmlTemperatureSensors_t, unsigned int *);
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typedef nvmlReturn_t (*NVML_DEVICE_GET_FAN_SPEED) (nvmlDevice_t, unsigned int *);
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typedef nvmlReturn_t (*NVML_DEVICE_GET_POWER_USAGE) (nvmlDevice_t, unsigned int *);
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typedef nvmlReturn_t (*NVML_DEVICE_GET_UTILIZATION_RATES) (nvmlDevice_t, nvmlUtilization_t *);
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2016-05-28 16:49:23 +02:00
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typedef nvmlReturn_t (*NVML_DEVICE_GET_CLOCKINFO) (nvmlDevice_t, nvmlClockType_t, unsigned int *);
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2016-05-29 00:59:24 +02:00
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typedef nvmlReturn_t (*NVML_DEVICE_GET_THRESHOLD) (nvmlDevice_t, nvmlTemperatureThresholds_t, unsigned int *);
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2016-05-29 16:54:07 +02:00
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typedef nvmlReturn_t (*NVML_DEVICE_GET_CURRPCIELINKGENERATION) (nvmlDevice_t, unsigned int *);
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typedef nvmlReturn_t (*NVML_DEVICE_GET_CURRPCIELINKWIDTH) (nvmlDevice_t, unsigned int *);
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2015-12-15 20:34:07 +01:00
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2016-02-02 01:14:33 +01:00
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typedef struct
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{
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NV_LIB lib;
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NVML_ERROR_STRING nvmlErrorString;
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NVML_INIT nvmlInit;
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NVML_SHUTDOWN nvmlShutdown;
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NVML_DEVICE_GET_NAME nvmlDeviceGetName;
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NVML_DEVICE_GET_HANDLE_BY_INDEX nvmlDeviceGetHandleByIndex;
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NVML_DEVICE_GET_TEMPERATURE nvmlDeviceGetTemperature;
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NVML_DEVICE_GET_FAN_SPEED nvmlDeviceGetFanSpeed;
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NVML_DEVICE_GET_POWER_USAGE nvmlDeviceGetPowerUsage;
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NVML_DEVICE_GET_UTILIZATION_RATES nvmlDeviceGetUtilizationRates;
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2016-05-28 16:49:23 +02:00
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NVML_DEVICE_GET_CLOCKINFO nvmlDeviceGetClockInfo;
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2016-05-29 00:59:24 +02:00
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NVML_DEVICE_GET_THRESHOLD nvmlDeviceGetTemperatureThreshold;
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2016-05-29 16:54:07 +02:00
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NVML_DEVICE_GET_CURRPCIELINKGENERATION nvmlDeviceGetCurrPcieLinkGeneration;
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NVML_DEVICE_GET_CURRPCIELINKWIDTH nvmlDeviceGetCurrPcieLinkWidth;
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2016-02-02 01:14:33 +01:00
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} hm_nvml_lib_t;
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#define NVML_PTR hm_nvml_lib_t
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int nvml_init (NVML_PTR *lib);
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void nvml_close (NVML_PTR *lib);
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const char * hm_NVML_nvmlErrorString (NVML_PTR *nvml, nvmlReturn_t nvml_rc);
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nvmlReturn_t hm_NVML_nvmlInit (NVML_PTR *nvml);
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nvmlReturn_t hm_NVML_nvmlShutdown (NVML_PTR *nvml);
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nvmlReturn_t hm_NVML_nvmlDeviceGetName (NVML_PTR *nvml, nvmlDevice_t device, char *name, unsigned int length);
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nvmlReturn_t hm_NVML_nvmlDeviceGetHandleByIndex (NVML_PTR *nvml, int, unsigned int index, nvmlDevice_t *device);
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nvmlReturn_t hm_NVML_nvmlDeviceGetTemperature (NVML_PTR *nvml, nvmlDevice_t device, nvmlTemperatureSensors_t sensorType, unsigned int *temp);
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nvmlReturn_t hm_NVML_nvmlDeviceGetFanSpeed (NVML_PTR *nvml, int, nvmlDevice_t device, unsigned int *speed);
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nvmlReturn_t hm_NVML_nvmlDeviceGetPowerUsage (NVML_PTR *nvml, nvmlDevice_t device, unsigned int *power);
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nvmlReturn_t hm_NVML_nvmlDeviceGetUtilizationRates (NVML_PTR *nvml, nvmlDevice_t device, nvmlUtilization_t *utilization);
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2016-05-28 16:49:23 +02:00
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nvmlReturn_t hm_NVML_nvmlDeviceGetClockInfo (NVML_PTR *nvml, nvmlDevice_t device, nvmlClockType_t type, unsigned int *clock);
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2016-05-29 00:59:24 +02:00
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nvmlReturn_t hm_NVML_nvmlDeviceGetTemperatureThreshold (NVML_PTR *nvml, nvmlDevice_t device, nvmlTemperatureThresholds_t thresholdType, unsigned int *temp);
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2016-05-29 16:54:07 +02:00
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nvmlReturn_t hm_NVML_nvmlDeviceGetCurrPcieLinkGeneration (NVML_PTR *nvml, nvmlDevice_t device, unsigned int *currLinkGen);
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nvmlReturn_t hm_NVML_nvmlDeviceGetCurrPcieLinkWidth (NVML_PTR *nvml, nvmlDevice_t device, unsigned int *currLinkWidth);
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2015-12-04 15:47:52 +01:00
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2016-01-20 20:55:09 +01:00
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#endif // HAVE_HWMON && HAVE_NVML
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2016-02-02 01:14:33 +01:00
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#endif // EXT_NVML_H
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