Add support for Odroid M1S Board (#3121)
* Copy Odroid-m1 config for new odroid-m1s board
* config: Adjust names and paths for odroid-m1s
* configs: Use rk3566 blobs for ATF
* set correct fdt in uboot.ush
* Add linux patches with Odroid-m1s devicetree
Synced from Hardkernel unofficial 6.1 tree
ae33b44557/arch/arm64/boot/dts/rockchip/rk3566-odroid-m1s.dts
With additional cleanup and fixes for mainline linux
* Add Odroid M1S to Github actions
* uboot: Patch boot order to set SD Card first
* Create u-boot placeholder partion for odroid-m1s also
* Switch u-boot to full odroid-m1s config
* cherry-pick emmc stability improvements
* Generalise u-boot to use ${devtype} instead of hardcoded mmc
* Remove deprecated snps, reset options from device tree
* re-enable uboot ethernet
This commit is contained in:
Tim L
GitHub
parent
623ebd8d38
commit
1b66f81dfa
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@ -41,6 +41,12 @@
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"architecture": "aarch64",
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"label": "board/odroid"
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},
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{
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"id": "odroid-m1s",
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"defconfig": "odroid_m1s",
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"architecture": "aarch64",
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"label": "board/odroid"
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},
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{
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"id": "odroid-n2",
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"defconfig": "odroid_n2",
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@ -0,0 +1,24 @@
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#!/bin/bash
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# shellcheck disable=SC2155
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function hassos_pre_image() {
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local BOOT_DATA="$(path_boot_dir)"
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local SPL_IMG="$(path_spl_img)"
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cp "${BINARIES_DIR}/boot.scr" "${BOOT_DATA}/boot.scr"
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cp "${BINARIES_DIR}"/*.dtb "${BOOT_DATA}/"
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cp "${BOARD_DIR}/boot-env.txt" "${BOOT_DATA}/haos-config.txt"
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cp "${BOARD_DIR}/cmdline.txt" "${BOOT_DATA}/cmdline.txt"
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# SPL
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create_spl_image
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dd if="${BINARIES_DIR}/u-boot-rockchip.bin" of="${SPL_IMG}" conv=notrunc bs=512 seek=64
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}
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function hassos_post_image() {
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convert_disk_image_xz
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}
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@ -0,0 +1,12 @@
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# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
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CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
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CONFIG_THERMAL_GOV_BANG_BANG=y
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CONFIG_SENSORS_GPIO_FAN=y
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CONFIG_KEYBOARD_GPIO=y
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CONFIG_KEYBOARD_GPIO_POLLED=y
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CONFIG_MMC_SDHCI_OF_DWCMSHC=y
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# CONFIG_DW_WATCHDOG is not set
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@ -0,0 +1,12 @@
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BOARD_ID=odroid-m1s
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BOARD_NAME="Hardkernel ODROID-M1S"
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CHASSIS=embedded
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BOOTLOADER=uboot
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KERNEL_FILE=Image
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BOOT_SYS=gpt
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BOOT_SIZE=16M
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BOOT_SPL=true
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BOOT_SPL_SIZE=16M
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BOOT_ENV_SIZE=0x8000
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SUPERVISOR_MACHINE=odroid-m1
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SUPERVISOR_ARCH=aarch64
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@ -0,0 +1,896 @@
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From 83dadbe0a615f6fc7550dec98dee938647050990 Mon Sep 17 00:00:00 2001
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From: Tim Lunn <tim@feathertop.org>
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Date: Sun, 28 Jan 2024 18:52:26 +1100
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Subject: [PATCH] arm64: dts: rockchip: Import Hardkernel ODROID-M1S board
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Odroid-m1s is in the process of being upstreamed.
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For now sync dts for Odroid-m1s:
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https://github.com/tobetter/linux/blob/ae33b445578884c70d7bfc5d6d519de4db815ccd/arch/arm64/boot/dts/rockchip/rk3566-odroid-m1s.dts
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---
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arch/arm64/boot/dts/rockchip/Makefile | 1 +
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.../boot/dts/rockchip/rk3566-odroid-m1s.dts | 861 ++++++++++++++++++
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2 files changed, 862 insertions(+)
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create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-odroid-m1s.dts
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diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
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index 8c15593c0ca4..362359684ed0 100644
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--- a/arch/arm64/boot/dts/rockchip/Makefile
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+++ b/arch/arm64/boot/dts/rockchip/Makefile
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@@ -63,6 +63,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-rock-pi-n10.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg353p.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg503.dtb
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+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-odroid-m1s.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.1.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.2.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-a.dtb
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diff --git a/arch/arm64/boot/dts/rockchip/rk3566-odroid-m1s.dts b/arch/arm64/boot/dts/rockchip/rk3566-odroid-m1s.dts
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new file mode 100644
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index 000000000000..1cad9217c374
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--- /dev/null
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+++ b/arch/arm64/boot/dts/rockchip/rk3566-odroid-m1s.dts
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@@ -0,0 +1,861 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+/*
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+ * Copyright (c) 2023 Hardkernel Co., Ltd.
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+ *
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+ */
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+
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+/dts-v1/;
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/leds/common.h>
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+#include <dt-bindings/pinctrl/rockchip.h>
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+#include <dt-bindings/soc/rockchip,vop2.h>
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+
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+#include "rk3566.dtsi"
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+
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+/ {
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+ model = "Hardkernel ODROID-M1S";
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+ compatible = "rockchip,rk3566-odroid-m1", "rockchip,rk3566";
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+
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+ aliases {
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+ ethernet1 = &gmac1;
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+ i2c0 = &i2c3;
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+ i2c3 = &i2c0;
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+ mmc0 = &sdhci;
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+ mmc1 = &sdmmc0;
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+ serial0 = &uart1;
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+ serial1 = &uart0;
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+ };
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+
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+ chosen: chosen {
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+ stdout-path = "serial2:1500000n8";
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+ };
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+
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+ hdmi-con {
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+ compatible = "hdmi-connector";
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+ type = "a";
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+
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+ port {
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+ hdmi_con_in: endpoint {
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+ remote-endpoint = <&hdmi_out_con>;
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+ };
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+ };
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+ };
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+
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+ gmac1_clkin: external-gmac1-clock {
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+ compatible = "fixed-clock";
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+ clock-frequency = <125000000>;
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+ clock-output-names = "gmac1_clkin";
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+ #clock-cells = <0>;
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+ };
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+
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+ leds {
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+ compatible = "gpio-leds";
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+ status = "okay";
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+
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+ red_led: red {
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+ gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_LOW>;
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+ linux,default-trigger = "default-on";
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+ function = LED_FUNCTION_POWER;
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+ color = <LED_COLOR_ID_RED>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&led_power_en>;
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+ };
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+ blue_led: blue {
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+ gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
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+ linux,default-trigger = "heartbeat";
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+ function = LED_FUNCTION_HEARTBEAT;
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+ color = <LED_COLOR_ID_BLUE>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&led_work_en>;
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+ };
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+ };
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+
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+ pcie20_3v3: pcie20-3v3-regulator {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pcie20_3v3_en>;
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+ regulator-name = "pcie20_3v3";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ };
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+
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+ rk809-sound {
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+ compatible = "simple-audio-card";
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+ simple-audio-card,format = "i2s";
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+ simple-audio-card,name = "ODROID-M1-FRONT";
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+ simple-audio-card,mclk-fs = <256>;
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+ status = "okay";
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+
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+ simple-audio-card,cpu {
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+ sound-dai = <&i2s1_8ch>;
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+ };
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+
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+ simple-audio-card,codec {
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+ sound-dai = <&rk809>;
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+ };
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+ };
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+
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+ vcc3v3_sys: vcc3v3-sys {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc3v3_sys";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ vin-supply = <&vcc5v0_sys>;
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+ };
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+
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+ vcc5v_dcin: vcc5v-dcin {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc-5v";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ };
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+
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+ vcc5v0_sys: vcc5v0-sys {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc5v0_sys";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ vin-supply = <&vcc5v_dcin>;
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+ };
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+
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+ vcc5v0_host: vcc5v0-host-regulator {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&vcc5v0_host_en>;
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+ regulator-name = "vcc5v0_host";
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ vin-supply = <&vcc5v0_sys>;
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+ };
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+
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+ vcc5v0_usb_otg: vcc5v0-otg-regulator {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&vcc5v0_usb_otg_en>;
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+ regulator-name = "vcc5v0_usb_otg";
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ vin-supply = <&vcc5v0_sys>;
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+ };
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+
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+ vcc5v0_usb_host: vcc5v0-usb3-regulator {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&vcc5v0_usb_host_en>;
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+ regulator-name = "vcc5v0_usb_host";
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ vin-supply = <&vcc5v0_sys>;
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+ };
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+};
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+
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+&combphy1 {
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+ phy-supply = <&vcc5v0_usb_host>;
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+ status = "okay";
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+};
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+
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+&combphy2 {
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+ status = "okay";
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+};
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+
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+&cpu0 {
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+ cpu-supply = <&vdd_cpu>;
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+};
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+
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+&cpu1 {
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+ cpu-supply = <&vdd_cpu>;
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+};
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+
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+&cpu2 {
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+ cpu-supply = <&vdd_cpu>;
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+};
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+
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+&cpu3 {
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+ cpu-supply = <&vdd_cpu>;
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+};
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+
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+&display_subsystem {
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+ status = "okay";
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+};
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+
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+&gmac1 {
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+ assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>;
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+ assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>;
|
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+ clock_in_out = "input";
|
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+ phy-supply = <&vcc_3v3>;
|
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+ phy-mode = "rgmii";
|
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+ pinctrl-names = "default";
|
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+ pinctrl-0 = <&gmac1m1_miim
|
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+ &gmac1m1_tx_bus2
|
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+ &gmac1m1_rx_bus2
|
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+ &gmac1m1_rgmii_clk
|
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+ &gmac1m1_rgmii_bus
|
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+ &gmac1m1_clkinout>;
|
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+ snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
|
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+ snps,reset-active-low;
|
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+ /* Reset time is 20ms, 100ms for rtl8211f */
|
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+ snps,reset-delays-us = <0 20000 100000>;
|
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+ tx_delay = <0x4f>;
|
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+ rx_delay = <0x2d>;
|
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+ phy-handle = <&rgmii_phy1>;
|
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+ status = "okay";
|
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+};
|
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+
|
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+&gpio0 {
|
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+ gpio-line-names =
|
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+ /* GPIO0_A0-A3 */
|
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+ "", "", "", "",
|
||||
+ /* GPIO0_A4-A7 */
|
||||
+ "", "", "", "",
|
||||
+
|
||||
+ /* GPIO0_B0-B3 */
|
||||
+ "", "", "", "PIN_28",
|
||||
+ /* GPIO0_B4-B7 */
|
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+ "PIN_27", "PIN_33", "PIN_7", "",
|
||||
+
|
||||
+ /* GPIO0_C0-C3 */
|
||||
+ "PIN_11", "PIN_13", "PIN_15", "",
|
||||
+ /* GPIO0_C4-C7 */
|
||||
+ "", "", "", "",
|
||||
+
|
||||
+ /* GPIO0_D0-D3 */
|
||||
+ "", "", "", "",
|
||||
+ /* GPIO0_D4-D7 */
|
||||
+ "", "", "", "";
|
||||
+};
|
||||
+
|
||||
+&gpio1 {
|
||||
+ gpio-line-names =
|
||||
+ /* GPIO1_A0-A3 */
|
||||
+ "", "", "", "",
|
||||
+ /* GPIO1_A4-A7 */
|
||||
+ "", "", "", "",
|
||||
+
|
||||
+ /* GPIO1_B0-B3 */
|
||||
+ "", "", "", "",
|
||||
+ /* GPIO1_B4-B7 */
|
||||
+ "", "", "", "",
|
||||
+
|
||||
+ /* GPIO1_C0-C3 */
|
||||
+ "", "", "", "",
|
||||
+ /* GPIO1_C4-C7 */
|
||||
+ "", "", "", "",
|
||||
+
|
||||
+ /* GPIO1_D0-D3 */
|
||||
+ "", "", "", "",
|
||||
+ /* GPIO1_D4-D7 */
|
||||
+ "", "", "", "";
|
||||
+};
|
||||
+
|
||||
+&gpio2 {
|
||||
+ gpio-line-names =
|
||||
+ /* GPIO2_A0-A3 */
|
||||
+ "", "", "", "PIN_10",
|
||||
+ /* GPIO2_A4-A7 */
|
||||
+ "PIN_8", "PINN_35", "PIN_36", "PIN_12",
|
||||
+
|
||||
+ /* GPIO2_B0-B3 */
|
||||
+ "PIN_22", "PIN_26", "PIN_32", "",
|
||||
+ /* GPIO2_B4-B7 */
|
||||
+ "", "PIN_16", "PIN_18", "PIN_31",
|
||||
+
|
||||
+ /* GPIO2_C0-C3 */
|
||||
+ "PIN_29", "", "", "",
|
||||
+ /* GPIO2_C4-C7 */
|
||||
+ "", "", "", "",
|
||||
+
|
||||
+ /* GPIO2_D0-D3 */
|
||||
+ "", "", "", "",
|
||||
+ /* GPIO2_D4-D7 */
|
||||
+ "", "", "", "";
|
||||
+};
|
||||
+
|
||||
+&gpio3 {
|
||||
+ gpio-line-names =
|
||||
+ /* GPIO3_A0-A3 */
|
||||
+ "", "PIN_24", "", "",
|
||||
+ /* GPIO3_A4-A7 */
|
||||
+ "", "", "", "",
|
||||
+
|
||||
+ /* GPIO3_B0-B3 */
|
||||
+ "", "", "", "EXTPIN_13",
|
||||
+ /* GPIO3_B4-B7 */
|
||||
+ "EXTPIN_14", "PIN_5", "PIN_3", "",
|
||||
+
|
||||
+ /* GPIO3_C0-C3 */
|
||||
+ "", "PIN_19", "PIN_21", "PIN_23",
|
||||
+ /* GPIO3_C4-C7 */
|
||||
+ "EXTPIN_11", "EXTPIN_12", "", "",
|
||||
+
|
||||
+ /* GPIO3_D0-D3 */
|
||||
+ "", "", "", "",
|
||||
+ /* GPIO3_D4-D7 */
|
||||
+ "", "", "", "";
|
||||
+};
|
||||
+
|
||||
+&gpio4 {
|
||||
+ gpio-line-names =
|
||||
+ /* GPIO4_A0-A3 */
|
||||
+ "", "", "", "",
|
||||
+ /* GPIO4_A4-A7 */
|
||||
+ "", "", "", "",
|
||||
+
|
||||
+ /* GPIO4_B0-B3 */
|
||||
+ "", "", "", "",
|
||||
+ /* GPIO4_B4-B7 */
|
||||
+ "", "", "", "",
|
||||
+
|
||||
+ /* GPIO4_C0-C3 */
|
||||
+ "", "", "", "",
|
||||
+ /* GPIO4_C4-C7 */
|
||||
+ "", "", "", "",
|
||||
+
|
||||
+ /* GPIO4_D0-D3 */
|
||||
+ "", "", "", "",
|
||||
+ /* GPIO4_D4-D7 */
|
||||
+ "", "", "", "";
|
||||
+};
|
||||
+
|
||||
+&gpu {
|
||||
+ mali-supply = <&vdd_gpu>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&hdmi {
|
||||
+ avdd-0v9-supply = <&vdda0v9_image>;
|
||||
+ avdd-1v8-supply = <&vcca1v8_image>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&hdmi_in {
|
||||
+ hdmi_in_vp0: endpoint {
|
||||
+ remote-endpoint = <&vp0_out_hdmi>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&hdmi_out {
|
||||
+ hdmi_out_con: endpoint {
|
||||
+ remote-endpoint = <&hdmi_con_in>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&hdmi_sound {
|
||||
+ simple-audio-card,name = "ODROID-M1-HDMI";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2c0 {
|
||||
+ status = "okay";
|
||||
+ vdd_cpu: tcs4525@1c {
|
||||
+ compatible = "tcs,tcs452x";
|
||||
+ reg = <0x1c>;
|
||||
+ vin-supply = <&vcc5v0_sys>;
|
||||
+ regulator-compatible = "fan53555-reg";
|
||||
+ regulator-name = "vdd_cpu";
|
||||
+ regulator-min-microvolt = <712500>;
|
||||
+ regulator-max-microvolt = <1390000>;
|
||||
+ regulator-init-microvolt = <900000>;
|
||||
+ regulator-ramp-delay = <2300>;
|
||||
+ fcs,suspend-voltage-selector = <1>;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-always-on;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ rk809: pmic@20 {
|
||||
+ compatible = "rockchip,rk809";
|
||||
+ reg = <0x20>;
|
||||
+ interrupt-parent = <&gpio0>;
|
||||
+ interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
|
||||
+ assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
|
||||
+ #clock-cells = <1>;
|
||||
+ clock-names = "mclk";
|
||||
+ clocks = <&cru I2S1_MCLKOUT_TX>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pmic_int>, <&i2s1m0_mclk>;
|
||||
+ rockchip,system-power-controller;
|
||||
+ #sound-dai-cells = <0>;
|
||||
+ vcc1-supply = <&vcc3v3_sys>;
|
||||
+ vcc2-supply = <&vcc3v3_sys>;
|
||||
+ vcc3-supply = <&vcc3v3_sys>;
|
||||
+ vcc4-supply = <&vcc3v3_sys>;
|
||||
+ vcc5-supply = <&vcc3v3_sys>;
|
||||
+ vcc6-supply = <&vcc3v3_sys>;
|
||||
+ vcc7-supply = <&vcc3v3_sys>;
|
||||
+ vcc8-supply = <&vcc3v3_sys>;
|
||||
+ vcc9-supply = <&vcc3v3_sys>;
|
||||
+ wakeup-source;
|
||||
+
|
||||
+ regulators {
|
||||
+ vdd_logic: DCDC_REG1 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <500000>;
|
||||
+ regulator-max-microvolt = <1350000>;
|
||||
+ regulator-init-microvolt = <900000>;
|
||||
+ regulator-ramp-delay = <6001>;
|
||||
+ regulator-initial-mode = <0x2>;
|
||||
+ regulator-name = "vdd_logic";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd_gpu: DCDC_REG2 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <500000>;
|
||||
+ regulator-max-microvolt = <1350000>;
|
||||
+ regulator-init-microvolt = <900000>;
|
||||
+ regulator-ramp-delay = <6001>;
|
||||
+ regulator-initial-mode = <0x2>;
|
||||
+ regulator-name = "vdd_gpu";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_ddr: DCDC_REG3 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-initial-mode = <0x2>;
|
||||
+ regulator-name = "vcc_ddr";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd_npu: DCDC_REG4 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <500000>;
|
||||
+ regulator-max-microvolt = <1350000>;
|
||||
+ regulator-init-microvolt = <900000>;
|
||||
+ regulator-ramp-delay = <6001>;
|
||||
+ regulator-initial-mode = <0x2>;
|
||||
+ regulator-name = "vdd_npu";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdda0v9_image: LDO_REG1 {
|
||||
+ regulator-boot-on;
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <900000>;
|
||||
+ regulator-max-microvolt = <900000>;
|
||||
+ regulator-name = "vdda0v9_image";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdda_0v9: LDO_REG2 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <900000>;
|
||||
+ regulator-max-microvolt = <900000>;
|
||||
+ regulator-name = "vdda_0v9";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdda0v9_pmu: LDO_REG3 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <900000>;
|
||||
+ regulator-max-microvolt = <900000>;
|
||||
+ regulator-name = "vdda0v9_pmu";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <900000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vccio_acodec: LDO_REG4 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <3000000>;
|
||||
+ regulator-max-microvolt = <3000000>;
|
||||
+ regulator-name = "vccio_acodec";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vccio_sd: LDO_REG5 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-name = "vccio_sd";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc3v3_pmu: LDO_REG6 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-name = "vcc3v3_pmu";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <3300000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcca_1v8: LDO_REG7 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-name = "vcca_1v8";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcca1v8_ddr: LDO_REG8 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-name = "vcca1v8_pmu";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <1800000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcca1v8_image: LDO_REG9 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-name = "vcca1v8_image";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_1v8: DCDC_REG5 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-name = "vcc_1v8";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_3v3: SWITCH_REG1 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-name = "vcc_3v3";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc3v3_sd: SWITCH_REG2 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-name = "vcc3v3_sd";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&i2c2 {
|
||||
+ status = "disabled";
|
||||
+
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&i2c2m1_xfer>;
|
||||
+
|
||||
+ clock-frequency = <400000>;
|
||||
+};
|
||||
+
|
||||
+&i2c3 {
|
||||
+ status = "disabled";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&i2c3m1_xfer>;
|
||||
+};
|
||||
+
|
||||
+&i2s0_8ch {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2s1_8ch {
|
||||
+ status = "okay";
|
||||
+ rockchip,clk-trcm = <1>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&i2s1m0_sclktx
|
||||
+ &i2s1m0_lrcktx
|
||||
+ &i2s1m0_sdi0
|
||||
+ &i2s1m0_sdo0>;
|
||||
+};
|
||||
+
|
||||
+&mdio1 {
|
||||
+ rgmii_phy1: phy@0 {
|
||||
+ compatible = "ethernet-phy-ieee802.3-c22";
|
||||
+ reg = <0x0>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pcie2x1 {
|
||||
+ reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
|
||||
+ vpcie3v3-supply = <&pcie20_3v3>;
|
||||
+ pinctrl-0 = <&pcie20m2_pins>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pinctrl {
|
||||
+ gmac1 {
|
||||
+ gmac1m1_miim: gmac1m1-miim {
|
||||
+ rockchip,pins =
|
||||
+ /* gmac1_mdcm1 */
|
||||
+ <4 RK_PB6 3 &pcfg_pull_none_drv_level_15>,
|
||||
+ /* gmac1_mdiom1 */
|
||||
+ <4 RK_PB7 3 &pcfg_pull_none_drv_level_15>;
|
||||
+ };
|
||||
+
|
||||
+ gmac1m1_clkinout: gmac1m1-clkinout {
|
||||
+ rockchip,pins =
|
||||
+ /* gmac1_mclkinoutm1 */
|
||||
+ <4 RK_PC1 3 &pcfg_pull_none_drv_level_15>;
|
||||
+ };
|
||||
+
|
||||
+ gmac1m1_rx_bus2: gmac1m1-rx-bus2 {
|
||||
+ rockchip,pins =
|
||||
+ /* gmac1_rxd0m1 */
|
||||
+ <4 RK_PA7 3 &pcfg_pull_none_drv_level_15>,
|
||||
+ /* gmac1_rxd1m1 */
|
||||
+ <4 RK_PB0 3 &pcfg_pull_none_drv_level_15>,
|
||||
+ /* gmac1_rxdvcrsm1 */
|
||||
+ <4 RK_PB1 3 &pcfg_pull_none_drv_level_15>;
|
||||
+ };
|
||||
+
|
||||
+ gmac1m1_tx_bus2: gmac1m1-tx-bus2 {
|
||||
+ rockchip,pins =
|
||||
+ /* gmac1_txd0m1 */
|
||||
+ <4 RK_PA4 3 &pcfg_pull_none_drv_level_15>,
|
||||
+ /* gmac1_txd1m1 */
|
||||
+ <4 RK_PA5 3 &pcfg_pull_none_drv_level_15>,
|
||||
+ /* gmac1_txenm1 */
|
||||
+ <4 RK_PA6 3 &pcfg_pull_none_drv_level_15>;
|
||||
+ };
|
||||
+
|
||||
+ gmac1m1_rgmii_clk: gmac1m1-rgmii-clk {
|
||||
+ rockchip,pins =
|
||||
+ /* gmac1_rxclkm1 */
|
||||
+ <4 RK_PA3 3 &pcfg_pull_none_drv_level_15>,
|
||||
+ /* gmac1_txclkm1 */
|
||||
+ <4 RK_PA0 3 &pcfg_pull_none_drv_level_15>;
|
||||
+ };
|
||||
+
|
||||
+ gmac1m1_rgmii_bus: gmac1m1-rgmii-bus {
|
||||
+ rockchip,pins =
|
||||
+ /* gmac1_rxd2m1 */
|
||||
+ <4 RK_PA1 3 &pcfg_pull_none_drv_level_15>,
|
||||
+ /* gmac1_rxd3m1 */
|
||||
+ <4 RK_PA2 3 &pcfg_pull_none_drv_level_15>,
|
||||
+ /* gmac1_txd2m1 */
|
||||
+ <3 RK_PD6 3 &pcfg_pull_none_drv_level_15>,
|
||||
+ /* gmac1_txd3m1 */
|
||||
+ <3 RK_PD7 3 &pcfg_pull_none_drv_level_15>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ leds {
|
||||
+ led_power_en: led_power_en {
|
||||
+ rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ led_work_en: led_work_en {
|
||||
+ rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ pcie {
|
||||
+ pcie20_3v3_en: pcie20-3v3-en {
|
||||
+ rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ pmic {
|
||||
+ pmic_int: pmic_int {
|
||||
+ rockchip,pins =
|
||||
+ <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ usb {
|
||||
+ vcc5v0_host_en: vcc5v0-host-en {
|
||||
+ rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+
|
||||
+ vcc5v0_usb_otg_en: vcc5v0-otg-en {
|
||||
+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+
|
||||
+ vcc5v0_usb_host_en: vcc5v0-usb3-en {
|
||||
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pmu_io_domains {
|
||||
+ pmuio1-supply = <&vcc3v3_pmu>;
|
||||
+ pmuio2-supply = <&vcc3v3_pmu>;
|
||||
+ vccio1-supply = <&vccio_acodec>;
|
||||
+ vccio2-supply = <&vcc_1v8>;
|
||||
+ vccio3-supply = <&vccio_sd>;
|
||||
+ vccio4-supply = <&vcc_3v3>;
|
||||
+ vccio5-supply = <&vcc_3v3>;
|
||||
+ vccio6-supply = <&vcc_3v3>;
|
||||
+ vccio7-supply = <&vcc_3v3>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pwm1 {
|
||||
+ status = "disabled";
|
||||
+ pinctrl-0 = <&pwm1m1_pins>;
|
||||
+};
|
||||
+
|
||||
+&saradc {
|
||||
+ vref-supply = <&vcca_1v8>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&sdhci {
|
||||
+ bus-width = <8>;
|
||||
+ max-frequency = <200000000>;
|
||||
+ non-removable;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe &emmc_rstnout>;
|
||||
+ vmmc-supply = <&vcc_3v3>;
|
||||
+ vqmmc-supply = <&vcc_1v8>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&sdmmc0 {
|
||||
+ bus-width = <4>;
|
||||
+ cap-sd-highspeed;
|
||||
+ cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
|
||||
+ disable-wp;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
|
||||
+ sd-uhs-sdr104;
|
||||
+ vmmc-supply = <&vcc3v3_sys>;
|
||||
+ vqmmc-supply = <&vccio_sd>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tsadc {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart1 {
|
||||
+ dma-names = "tx", "rx";
|
||||
+ /* uart1 uart1-with-ctsrts */
|
||||
+ pinctrl-0 = <&uart1m1_xfer>;
|
||||
+ pinctrl-1 = <&uart1m1_xfer &uart1m1_ctsn &uart1m1_rtsn>;
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+
|
||||
+&uart2 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host0_ehci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host0_ohci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host0_xhci {
|
||||
+ dr_mode = "otg";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host1_ehci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host1_ohci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host1_xhci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy0 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy0_host {
|
||||
+ phy-supply = <&vcc5v0_usb_host>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy0_otg {
|
||||
+ vbus-supply = <&vcc5v0_usb_otg>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy1_host {
|
||||
+ phy-supply = <&vcc5v0_host>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy1_otg {
|
||||
+ phy-supply = <&vcc5v0_host>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&vop {
|
||||
+ assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
|
||||
+ assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&vop_mmu {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&vp0 {
|
||||
+ vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
|
||||
+ reg = <ROCKCHIP_VOP2_EP_HDMI0>;
|
||||
+ remote-endpoint = <&hdmi_in_vp0>;
|
||||
+ };
|
||||
+};
|
||||
--
|
||||
2.40.1
|
||||
|
||||
|
|
@ -0,0 +1,335 @@
|
|||
From eb02261dd6c88a7fcf3c28e59a7976905815fa6b Mon Sep 17 00:00:00 2001
|
||||
From: Tim Lunn <tim@feathertop.org>
|
||||
Date: Sun, 28 Jan 2024 18:55:57 +1100
|
||||
Subject: [PATCH] arm64: dts: clean up as required for mainline linux
|
||||
|
||||
---
|
||||
.../boot/dts/rockchip/rk3566-odroid-m1s.dts | 212 +++---------------
|
||||
1 file changed, 27 insertions(+), 185 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-odroid-m1s.dts b/arch/arm64/boot/dts/rockchip/rk3566-odroid-m1s.dts
|
||||
index 1cad9217c374..cbf2495901d7 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3566-odroid-m1s.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3566-odroid-m1s.dts
|
||||
@@ -18,12 +18,8 @@ / {
|
||||
|
||||
aliases {
|
||||
ethernet1 = &gmac1;
|
||||
- i2c0 = &i2c3;
|
||||
- i2c3 = &i2c0;
|
||||
mmc0 = &sdhci;
|
||||
mmc1 = &sdmmc0;
|
||||
- serial0 = &uart1;
|
||||
- serial1 = &uart0;
|
||||
};
|
||||
|
||||
chosen: chosen {
|
||||
@@ -52,7 +48,7 @@ leds {
|
||||
compatible = "gpio-leds";
|
||||
status = "okay";
|
||||
|
||||
- red_led: red {
|
||||
+ red_led: led-0 {
|
||||
gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "default-on";
|
||||
function = LED_FUNCTION_POWER;
|
||||
@@ -60,7 +56,7 @@ red_led: red {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&led_power_en>;
|
||||
};
|
||||
- blue_led: blue {
|
||||
+ blue_led: led-1 {
|
||||
gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
function = LED_FUNCTION_HEARTBEAT;
|
||||
@@ -97,6 +93,25 @@ simple-audio-card,codec {
|
||||
};
|
||||
};
|
||||
|
||||
+ spdif_dit: spdif-dit {
|
||||
+ compatible = "linux,spdif-dit";
|
||||
+ #sound-dai-cells = <0>;
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
+ spdif_sound: spdif-sound {
|
||||
+ compatible = "simple-audio-card";
|
||||
+ status = "disabled";
|
||||
+
|
||||
+ simple-audio-card,cpu {
|
||||
+ sound-dai = <&spdif>;
|
||||
+ };
|
||||
+
|
||||
+ simple-audio-card,codec {
|
||||
+ sound-dai = <&spdif_dit>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
vcc3v3_sys: vcc3v3-sys {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc3v3_sys";
|
||||
@@ -164,7 +179,6 @@ vcc5v0_usb_host: vcc5v0-usb3-regulator {
|
||||
};
|
||||
|
||||
&combphy1 {
|
||||
- phy-supply = <&vcc5v0_usb_host>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@@ -215,121 +229,6 @@ &gmac1m1_rgmii_bus
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
-&gpio0 {
|
||||
- gpio-line-names =
|
||||
- /* GPIO0_A0-A3 */
|
||||
- "", "", "", "",
|
||||
- /* GPIO0_A4-A7 */
|
||||
- "", "", "", "",
|
||||
-
|
||||
- /* GPIO0_B0-B3 */
|
||||
- "", "", "", "PIN_28",
|
||||
- /* GPIO0_B4-B7 */
|
||||
- "PIN_27", "PIN_33", "PIN_7", "",
|
||||
-
|
||||
- /* GPIO0_C0-C3 */
|
||||
- "PIN_11", "PIN_13", "PIN_15", "",
|
||||
- /* GPIO0_C4-C7 */
|
||||
- "", "", "", "",
|
||||
-
|
||||
- /* GPIO0_D0-D3 */
|
||||
- "", "", "", "",
|
||||
- /* GPIO0_D4-D7 */
|
||||
- "", "", "", "";
|
||||
-};
|
||||
-
|
||||
-&gpio1 {
|
||||
- gpio-line-names =
|
||||
- /* GPIO1_A0-A3 */
|
||||
- "", "", "", "",
|
||||
- /* GPIO1_A4-A7 */
|
||||
- "", "", "", "",
|
||||
-
|
||||
- /* GPIO1_B0-B3 */
|
||||
- "", "", "", "",
|
||||
- /* GPIO1_B4-B7 */
|
||||
- "", "", "", "",
|
||||
-
|
||||
- /* GPIO1_C0-C3 */
|
||||
- "", "", "", "",
|
||||
- /* GPIO1_C4-C7 */
|
||||
- "", "", "", "",
|
||||
-
|
||||
- /* GPIO1_D0-D3 */
|
||||
- "", "", "", "",
|
||||
- /* GPIO1_D4-D7 */
|
||||
- "", "", "", "";
|
||||
-};
|
||||
-
|
||||
-&gpio2 {
|
||||
- gpio-line-names =
|
||||
- /* GPIO2_A0-A3 */
|
||||
- "", "", "", "PIN_10",
|
||||
- /* GPIO2_A4-A7 */
|
||||
- "PIN_8", "PINN_35", "PIN_36", "PIN_12",
|
||||
-
|
||||
- /* GPIO2_B0-B3 */
|
||||
- "PIN_22", "PIN_26", "PIN_32", "",
|
||||
- /* GPIO2_B4-B7 */
|
||||
- "", "PIN_16", "PIN_18", "PIN_31",
|
||||
-
|
||||
- /* GPIO2_C0-C3 */
|
||||
- "PIN_29", "", "", "",
|
||||
- /* GPIO2_C4-C7 */
|
||||
- "", "", "", "",
|
||||
-
|
||||
- /* GPIO2_D0-D3 */
|
||||
- "", "", "", "",
|
||||
- /* GPIO2_D4-D7 */
|
||||
- "", "", "", "";
|
||||
-};
|
||||
-
|
||||
-&gpio3 {
|
||||
- gpio-line-names =
|
||||
- /* GPIO3_A0-A3 */
|
||||
- "", "PIN_24", "", "",
|
||||
- /* GPIO3_A4-A7 */
|
||||
- "", "", "", "",
|
||||
-
|
||||
- /* GPIO3_B0-B3 */
|
||||
- "", "", "", "EXTPIN_13",
|
||||
- /* GPIO3_B4-B7 */
|
||||
- "EXTPIN_14", "PIN_5", "PIN_3", "",
|
||||
-
|
||||
- /* GPIO3_C0-C3 */
|
||||
- "", "PIN_19", "PIN_21", "PIN_23",
|
||||
- /* GPIO3_C4-C7 */
|
||||
- "EXTPIN_11", "EXTPIN_12", "", "",
|
||||
-
|
||||
- /* GPIO3_D0-D3 */
|
||||
- "", "", "", "",
|
||||
- /* GPIO3_D4-D7 */
|
||||
- "", "", "", "";
|
||||
-};
|
||||
-
|
||||
-&gpio4 {
|
||||
- gpio-line-names =
|
||||
- /* GPIO4_A0-A3 */
|
||||
- "", "", "", "",
|
||||
- /* GPIO4_A4-A7 */
|
||||
- "", "", "", "",
|
||||
-
|
||||
- /* GPIO4_B0-B3 */
|
||||
- "", "", "", "",
|
||||
- /* GPIO4_B4-B7 */
|
||||
- "", "", "", "",
|
||||
-
|
||||
- /* GPIO4_C0-C3 */
|
||||
- "", "", "", "",
|
||||
- /* GPIO4_C4-C7 */
|
||||
- "", "", "", "",
|
||||
-
|
||||
- /* GPIO4_D0-D3 */
|
||||
- "", "", "", "",
|
||||
- /* GPIO4_D4-D7 */
|
||||
- "", "", "", "";
|
||||
-};
|
||||
-
|
||||
&gpu {
|
||||
mali-supply = <&vdd_gpu>;
|
||||
status = "okay";
|
||||
@@ -368,7 +267,6 @@ vdd_cpu: tcs4525@1c {
|
||||
regulator-name = "vdd_cpu";
|
||||
regulator-min-microvolt = <712500>;
|
||||
regulator-max-microvolt = <1390000>;
|
||||
- regulator-init-microvolt = <900000>;
|
||||
regulator-ramp-delay = <2300>;
|
||||
fcs,suspend-voltage-selector = <1>;
|
||||
regulator-boot-on;
|
||||
@@ -409,7 +307,6 @@ vdd_logic: DCDC_REG1 {
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <1350000>;
|
||||
- regulator-init-microvolt = <900000>;
|
||||
regulator-ramp-delay = <6001>;
|
||||
regulator-initial-mode = <0x2>;
|
||||
regulator-name = "vdd_logic";
|
||||
@@ -423,7 +320,6 @@ vdd_gpu: DCDC_REG2 {
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <1350000>;
|
||||
- regulator-init-microvolt = <900000>;
|
||||
regulator-ramp-delay = <6001>;
|
||||
regulator-initial-mode = <0x2>;
|
||||
regulator-name = "vdd_gpu";
|
||||
@@ -447,7 +343,6 @@ vdd_npu: DCDC_REG4 {
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <1350000>;
|
||||
- regulator-init-microvolt = <900000>;
|
||||
regulator-ramp-delay = <6001>;
|
||||
regulator-initial-mode = <0x2>;
|
||||
regulator-name = "vdd_npu";
|
||||
@@ -587,6 +482,9 @@ regulator-state-mem {
|
||||
};
|
||||
};
|
||||
};
|
||||
+ codec {
|
||||
+ rockchip,mic-in-differential;
|
||||
+ };
|
||||
};
|
||||
};
|
||||
|
||||
@@ -611,7 +509,7 @@ &i2s0_8ch {
|
||||
|
||||
&i2s1_8ch {
|
||||
status = "okay";
|
||||
- rockchip,clk-trcm = <1>;
|
||||
+ rockchip,trcm-sync-tx-only;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2s1m0_sclktx
|
||||
&i2s1m0_lrcktx
|
||||
@@ -620,7 +518,7 @@ &i2s1m0_sdi0
|
||||
};
|
||||
|
||||
&mdio1 {
|
||||
- rgmii_phy1: phy@0 {
|
||||
+ rgmii_phy1: ethernet-phy@0 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <0x0>;
|
||||
};
|
||||
@@ -634,62 +532,6 @@ &pcie2x1 {
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
- gmac1 {
|
||||
- gmac1m1_miim: gmac1m1-miim {
|
||||
- rockchip,pins =
|
||||
- /* gmac1_mdcm1 */
|
||||
- <4 RK_PB6 3 &pcfg_pull_none_drv_level_15>,
|
||||
- /* gmac1_mdiom1 */
|
||||
- <4 RK_PB7 3 &pcfg_pull_none_drv_level_15>;
|
||||
- };
|
||||
-
|
||||
- gmac1m1_clkinout: gmac1m1-clkinout {
|
||||
- rockchip,pins =
|
||||
- /* gmac1_mclkinoutm1 */
|
||||
- <4 RK_PC1 3 &pcfg_pull_none_drv_level_15>;
|
||||
- };
|
||||
-
|
||||
- gmac1m1_rx_bus2: gmac1m1-rx-bus2 {
|
||||
- rockchip,pins =
|
||||
- /* gmac1_rxd0m1 */
|
||||
- <4 RK_PA7 3 &pcfg_pull_none_drv_level_15>,
|
||||
- /* gmac1_rxd1m1 */
|
||||
- <4 RK_PB0 3 &pcfg_pull_none_drv_level_15>,
|
||||
- /* gmac1_rxdvcrsm1 */
|
||||
- <4 RK_PB1 3 &pcfg_pull_none_drv_level_15>;
|
||||
- };
|
||||
-
|
||||
- gmac1m1_tx_bus2: gmac1m1-tx-bus2 {
|
||||
- rockchip,pins =
|
||||
- /* gmac1_txd0m1 */
|
||||
- <4 RK_PA4 3 &pcfg_pull_none_drv_level_15>,
|
||||
- /* gmac1_txd1m1 */
|
||||
- <4 RK_PA5 3 &pcfg_pull_none_drv_level_15>,
|
||||
- /* gmac1_txenm1 */
|
||||
- <4 RK_PA6 3 &pcfg_pull_none_drv_level_15>;
|
||||
- };
|
||||
-
|
||||
- gmac1m1_rgmii_clk: gmac1m1-rgmii-clk {
|
||||
- rockchip,pins =
|
||||
- /* gmac1_rxclkm1 */
|
||||
- <4 RK_PA3 3 &pcfg_pull_none_drv_level_15>,
|
||||
- /* gmac1_txclkm1 */
|
||||
- <4 RK_PA0 3 &pcfg_pull_none_drv_level_15>;
|
||||
- };
|
||||
-
|
||||
- gmac1m1_rgmii_bus: gmac1m1-rgmii-bus {
|
||||
- rockchip,pins =
|
||||
- /* gmac1_rxd2m1 */
|
||||
- <4 RK_PA1 3 &pcfg_pull_none_drv_level_15>,
|
||||
- /* gmac1_rxd3m1 */
|
||||
- <4 RK_PA2 3 &pcfg_pull_none_drv_level_15>,
|
||||
- /* gmac1_txd2m1 */
|
||||
- <3 RK_PD6 3 &pcfg_pull_none_drv_level_15>,
|
||||
- /* gmac1_txd3m1 */
|
||||
- <3 RK_PD7 3 &pcfg_pull_none_drv_level_15>;
|
||||
- };
|
||||
- };
|
||||
-
|
||||
leds {
|
||||
led_power_en: led_power_en {
|
||||
rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
@@ -825,7 +667,7 @@ &usb2phy0_host {
|
||||
};
|
||||
|
||||
&usb2phy0_otg {
|
||||
- vbus-supply = <&vcc5v0_usb_otg>;
|
||||
+ phy-supply = <&vcc5v0_usb_otg>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
--
|
||||
2.40.1
|
||||
|
||||
|
|
@ -0,0 +1,43 @@
|
|||
From 641ec8e05726d42c8ec7fa3bda1d8a64f126b475 Mon Sep 17 00:00:00 2001
|
||||
From: Tim Lunn <tim@feathertop.org>
|
||||
Date: Fri, 12 Jan 2024 22:32:56 +1100
|
||||
Subject: [PATCH] arm64: dts: fix vdd_cpu regulator for mainline
|
||||
|
||||
---
|
||||
.../arm64/boot/dts/rockchip/rk3566-odroid-m1s.dts | 15 ++++++++-------
|
||||
1 file changed, 8 insertions(+), 7 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-odroid-m1s.dts b/arch/arm64/boot/dts/rockchip/rk3566-odroid-m1s.dts
|
||||
index cbf2495901d7..a5d9216b544b 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3566-odroid-m1s.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3566-odroid-m1s.dts
|
||||
@@ -259,18 +259,19 @@ &hdmi_sound {
|
||||
|
||||
&i2c0 {
|
||||
status = "okay";
|
||||
- vdd_cpu: tcs4525@1c {
|
||||
- compatible = "tcs,tcs452x";
|
||||
+
|
||||
+ vdd_cpu: regulator@1c {
|
||||
+ compatible = "tcs,tcs4525";
|
||||
reg = <0x1c>;
|
||||
- vin-supply = <&vcc5v0_sys>;
|
||||
- regulator-compatible = "fan53555-reg";
|
||||
+ fcs,suspend-voltage-selector = <1>;
|
||||
regulator-name = "vdd_cpu";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
regulator-min-microvolt = <712500>;
|
||||
regulator-max-microvolt = <1390000>;
|
||||
regulator-ramp-delay = <2300>;
|
||||
- fcs,suspend-voltage-selector = <1>;
|
||||
- regulator-boot-on;
|
||||
- regulator-always-on;
|
||||
+ vin-supply = <&vcc3v3_sys>;
|
||||
+
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
--
|
||||
2.40.1
|
||||
|
||||
|
|
@ -0,0 +1,51 @@
|
|||
From b4d16cd88ec2701dcb15b9519a79288ea5d2bfec Mon Sep 17 00:00:00 2001
|
||||
From: Tim Lunn <tim@feathertop.org>
|
||||
Date: Sat, 3 Feb 2024 23:40:16 +1100
|
||||
Subject: [PATCH] Remove deprecated snps,reset properties
|
||||
|
||||
---
|
||||
arch/arm64/boot/dts/rockchip/rk3566-odroid-m1s.dts | 11 +++++------
|
||||
1 file changed, 5 insertions(+), 6 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-odroid-m1s.dts b/arch/arm64/boot/dts/rockchip/rk3566-odroid-m1s.dts
|
||||
index b8adfd7024f9..e755d00b1d4f 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3566-odroid-m1s.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3566-odroid-m1s.dts
|
||||
@@ -192,8 +192,9 @@ &gmac1 {
|
||||
assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>;
|
||||
assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>;
|
||||
clock_in_out = "input";
|
||||
- phy-supply = <&vcc_3v3>;
|
||||
+ phy-handle = <&rgmii_phy1>;
|
||||
phy-mode = "rgmii";
|
||||
+ phy-supply = <&vcc_3v3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gmac1m1_miim
|
||||
&gmac1m1_tx_bus2
|
||||
@@ -201,13 +202,8 @@ &gmac1m1_rx_bus2
|
||||
&gmac1m1_rgmii_clk
|
||||
&gmac1m1_rgmii_bus
|
||||
&gmac1m1_clkinout>;
|
||||
- snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
|
||||
- snps,reset-active-low;
|
||||
- /* Reset time is 20ms, 100ms for rtl8211f */
|
||||
- snps,reset-delays-us = <0 20000 100000>;
|
||||
tx_delay = <0x4f>;
|
||||
rx_delay = <0x2d>;
|
||||
- phy-handle = <&rgmii_phy1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@@ -504,6 +500,9 @@ &mdio1 {
|
||||
rgmii_phy1: ethernet-phy@0 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <0x0>;
|
||||
+ reset-assert-us = <20000>;
|
||||
+ reset-deassert-us = <100000>;
|
||||
+ reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
--
|
||||
2.40.1
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,48 @@
|
|||
From ed61d0b5f18bf333ff7f35fc8546dd58d227b12f Mon Sep 17 00:00:00 2001
|
||||
From: Tim Lunn <tim@feathertop.org>
|
||||
Date: Sat, 3 Feb 2024 18:38:49 +1100
|
||||
Subject: [PATCH] Apply fixes for mainline u-boot
|
||||
|
||||
---
|
||||
arch/arm/dts/rk3566-odroid-m1s.dts | 6 +-----
|
||||
configs/odroid-m1s-rk3566_defconfig | 1 -
|
||||
2 files changed, 1 insertion(+), 6 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/dts/rk3566-odroid-m1s.dts b/arch/arm/dts/rk3566-odroid-m1s.dts
|
||||
index 73e29d80c7..2dba07ba19 100644
|
||||
--- a/arch/arm/dts/rk3566-odroid-m1s.dts
|
||||
+++ b/arch/arm/dts/rk3566-odroid-m1s.dts
|
||||
@@ -17,12 +17,8 @@
|
||||
|
||||
aliases {
|
||||
ethernet0 = &gmac1;
|
||||
- i2c0 = &i2c3;
|
||||
- i2c3 = &i2c0;
|
||||
mmc0 = &sdhci;
|
||||
mmc1 = &sdmmc0;
|
||||
- serial0 = &uart1;
|
||||
- serial1 = &uart0;
|
||||
};
|
||||
|
||||
chosen {
|
||||
@@ -578,7 +574,7 @@
|
||||
disable-wp;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
|
||||
- sd-uhs-sdr50;
|
||||
+ sd-uhs-sdr104;
|
||||
vmmc-supply = <&vcc3v3_sd>;
|
||||
vqmmc-supply = <&vccio_sd>;
|
||||
status = "okay";
|
||||
diff --git a/configs/odroid-m1s-rk3566_defconfig b/configs/odroid-m1s-rk3566_defconfig
|
||||
index d70a10dc08..61b6962063 100644
|
||||
--- a/configs/odroid-m1s-rk3566_defconfig
|
||||
+++ b/configs/odroid-m1s-rk3566_defconfig
|
||||
@@ -106,4 +106,3 @@ CONFIG_USB_DWC3=y
|
||||
CONFIG_USB_DWC3_GENERIC=y
|
||||
CONFIG_FS_CRAMFS=y
|
||||
CONFIG_ERRNO_STR=y
|
||||
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x0800
|
||||
--
|
||||
2.40.1
|
||||
|
||||
|
|
@ -0,0 +1,44 @@
|
|||
From 2a1d8f586799e4166e802babcce18c9980aa1f44 Mon Sep 17 00:00:00 2001
|
||||
From: Tim Lunn <tim@feathertop.org>
|
||||
Date: Thu, 1 Feb 2024 17:50:46 +1100
|
||||
Subject: [PATCH] Improve reliability of eMMC
|
||||
|
||||
Cherry-picked from:
|
||||
20240126232615.6826-2-jonas@kwiboo.se
|
||||
---
|
||||
arch/arm/dts/rk3566-odroid-m1s-u-boot.dtsi | 4 ----
|
||||
configs/odroid-m1s-rk3566_defconfig | 2 ++
|
||||
2 files changed, 2 insertions(+), 4 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/dts/rk3566-odroid-m1s-u-boot.dtsi b/arch/arm/dts/rk3566-odroid-m1s-u-boot.dtsi
|
||||
index 33a1d142b8..04d0cd17ef 100644
|
||||
--- a/arch/arm/dts/rk3566-odroid-m1s-u-boot.dtsi
|
||||
+++ b/arch/arm/dts/rk3566-odroid-m1s-u-boot.dtsi
|
||||
@@ -14,11 +14,7 @@
|
||||
|
||||
&sdhci {
|
||||
cap-mmc-highspeed;
|
||||
- mmc-ddr-1_8v;
|
||||
mmc-hs200-1_8v;
|
||||
- mmc-hs400-1_8v;
|
||||
- mmc-hs400-enhanced-strobe;
|
||||
- pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
diff --git a/configs/odroid-m1s-rk3566_defconfig b/configs/odroid-m1s-rk3566_defconfig
|
||||
index 61b6962063..7920ef224d 100644
|
||||
--- a/configs/odroid-m1s-rk3566_defconfig
|
||||
+++ b/configs/odroid-m1s-rk3566_defconfig
|
||||
@@ -70,6 +70,8 @@ CONFIG_ROCKCHIP_GPIO=y
|
||||
CONFIG_SYS_I2C_ROCKCHIP=y
|
||||
CONFIG_MISC=y
|
||||
CONFIG_SUPPORT_EMMC_RPMB=y
|
||||
+CONFIG_MMC_HS200_SUPPORT=y
|
||||
+CONFIG_SPL_MMC_HS200_SUPPORT=y
|
||||
CONFIG_MMC_DW=y
|
||||
CONFIG_MMC_DW_ROCKCHIP=y
|
||||
CONFIG_MMC_SDHCI=y
|
||||
--
|
||||
2.40.1
|
||||
|
||||
|
|
@ -0,0 +1,52 @@
|
|||
From 65a304151817626157e7be4e7e1581cdddca2a02 Mon Sep 17 00:00:00 2001
|
||||
From: Tim Lunn <tim@feathertop.org>
|
||||
Date: Sat, 3 Feb 2024 23:42:47 +1100
|
||||
Subject: [PATCH] Fix ethernet properties
|
||||
|
||||
---
|
||||
arch/arm/dts/rk3566-odroid-m1s.dts | 13 +++++++------
|
||||
1 file changed, 7 insertions(+), 6 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/dts/rk3566-odroid-m1s.dts b/arch/arm/dts/rk3566-odroid-m1s.dts
|
||||
index 2dba07ba19..73b545109d 100644
|
||||
--- a/arch/arm/dts/rk3566-odroid-m1s.dts
|
||||
+++ b/arch/arm/dts/rk3566-odroid-m1s.dts
|
||||
@@ -197,10 +197,9 @@
|
||||
};
|
||||
|
||||
&gmac1 {
|
||||
- assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>;
|
||||
- assigned-clock-rates = <0>, <125000000>;
|
||||
- assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
|
||||
- clock_in_out = "output";
|
||||
+ assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>;
|
||||
+ assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>;
|
||||
+ clock_in_out = "input";
|
||||
phy-handle = <&rgmii_phy1>;
|
||||
phy-mode = "rgmii";
|
||||
phy-supply = <&vcc3v3_sys>;
|
||||
@@ -211,10 +210,9 @@
|
||||
&gmac1m1_rgmii_clk
|
||||
&gmac1m1_rgmii_bus
|
||||
&gmac1m1_clkinout>;
|
||||
- status = "okay";
|
||||
-
|
||||
tx_delay = <0x4f>;
|
||||
rx_delay = <0x2d>;
|
||||
+ status = "okay";
|
||||
};
|
||||
|
||||
&gpu {
|
||||
@@ -496,6 +494,9 @@
|
||||
rgmii_phy1: ethernet-phy@0 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <0x0>;
|
||||
+ reset-assert-us = <20000>;
|
||||
+ reset-deassert-us = <100000>;
|
||||
+ reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
--
|
||||
2.40.1
|
||||
|
||||
|
|
@ -0,0 +1,98 @@
|
|||
part start ${devtype} ${devnum} hassos-bootstate mmc_env
|
||||
${devtype} dev ${devnum}
|
||||
|
||||
setenv loadbootstate " \
|
||||
echo 'loading env...'; \
|
||||
${devtype} read ${ramdisk_addr_r} ${mmc_env} 0x40; \
|
||||
env import -c ${ramdisk_addr_r} 0x8000;"
|
||||
|
||||
setenv storebootstate " \
|
||||
echo 'storing env...'; \
|
||||
env export -c -s 0x8000 ${ramdisk_addr_r} BOOT_ORDER BOOT_A_LEFT BOOT_B_LEFT MACHINE_ID; \
|
||||
${devtype} write ${ramdisk_addr_r} ${mmc_env} 0x40;"
|
||||
|
||||
run loadbootstate
|
||||
test -n "${BOOT_ORDER}" || setenv BOOT_ORDER "A B"
|
||||
test -n "${BOOT_A_LEFT}" || setenv BOOT_A_LEFT 3
|
||||
test -n "${BOOT_B_LEFT}" || setenv BOOT_B_LEFT 3
|
||||
|
||||
# Allows ConditionFirstBoot=
|
||||
test -n "${MACHINE_ID}" || setenv BOOT_CONDITION "systemd.condition-first-boot=true"
|
||||
|
||||
# HassOS bootargs
|
||||
setenv bootargs_hassos "zram.enabled=1 zram.num_devices=3 systemd.machine_id=${MACHINE_ID} fsck.repair=yes ${BOOT_CONDITION}"
|
||||
|
||||
# HassOS system A/B
|
||||
setenv bootargs_a "root=PARTUUID=8d3d53e3-6d49-4c38-8349-aff6859e82fd rootfstype=squashfs ro rootwait"
|
||||
setenv bootargs_b "root=PARTUUID=a3ec664e-32ce-4665-95ea-7ae90ce9aa20 rootfstype=squashfs ro rootwait"
|
||||
|
||||
part number ${devtype} ${devnum} hassos-boot boot_partnum
|
||||
|
||||
# Load environment from haos-config.txt
|
||||
if test -e ${devtype} ${devnum}:${boot_partnum} haos-config.txt; then
|
||||
fatload ${devtype} ${devnum}:${boot_partnum} ${ramdisk_addr_r} haos-config.txt
|
||||
env import -t ${ramdisk_addr_r} ${filesize}
|
||||
fi
|
||||
|
||||
# Load extraargs
|
||||
fileenv ${devtype} ${devnum}:${boot_partnum} ${ramdisk_addr_r} cmdline.txt cmdline
|
||||
|
||||
# Load device tree
|
||||
setenv fdtfile rk3566-odroid-m1s.dtb
|
||||
echo "Loading standard device tree ${fdtfile}"
|
||||
fatload ${devtype} ${devnum}:${boot_partnum} ${fdt_addr_r} ${fdtfile}
|
||||
fdt addr ${fdt_addr_r}
|
||||
|
||||
# load dt overlays
|
||||
fdt resize 65536
|
||||
for overlay_file in ${overlays}; do
|
||||
if fatload ${devtype} ${devnum}:${boot_partnum} ${ramdisk_addr_r} overlays/${overlay_file}.dtbo; then
|
||||
echo "Applying kernel provided DT overlay ${overlay_file}.dtbo"
|
||||
fdt apply ${ramdisk_addr_r} || setenv overlay_error "true"
|
||||
fi
|
||||
done
|
||||
if test "${overlay_error}" = "true"; then
|
||||
echo "Error applying DT overlays, restoring original DT"
|
||||
fatload ${devtype} ${devnum}:${boot_partnum} ${fdt_addr_r} ${fdtfile}
|
||||
fi
|
||||
|
||||
setenv bootargs
|
||||
for BOOT_SLOT in "${BOOT_ORDER}"; do
|
||||
if test "x${bootargs}" != "x"; then
|
||||
# skip remaining slots
|
||||
elif test "x${BOOT_SLOT}" = "xA"; then
|
||||
if test ${BOOT_A_LEFT} -gt 0; then
|
||||
setexpr BOOT_A_LEFT ${BOOT_A_LEFT} - 1
|
||||
echo "Trying to boot slot A, ${BOOT_A_LEFT} attempts remaining. Loading kernel ..."
|
||||
part number ${devtype} ${devnum} hassos-kernel0 kernel_partnum
|
||||
if load ${devtype} ${devnum}:${kernel_partnum} ${kernel_addr_r} Image; then
|
||||
setenv bootargs "${bootargs_hassos} ${bootargs_a} rauc.slot=A ${cmdline}"
|
||||
fi
|
||||
fi
|
||||
elif test "x${BOOT_SLOT}" = "xB"; then
|
||||
if test ${BOOT_B_LEFT} -gt 0; then
|
||||
setexpr BOOT_B_LEFT ${BOOT_B_LEFT} - 1
|
||||
echo "Trying to boot slot B, ${BOOT_B_LEFT} attempts remaining. Loading kernel ..."
|
||||
part number ${devtype} ${devnum} hassos-kernel1 kernel_partnum
|
||||
if load ${devtype} ${devnum}:${kernel_partnum} ${kernel_addr_r} Image; then
|
||||
setenv bootargs "${bootargs_hassos} ${bootargs_b} rauc.slot=B ${cmdline}"
|
||||
fi
|
||||
fi
|
||||
fi
|
||||
done
|
||||
|
||||
if test -n "${bootargs}"; then
|
||||
run storebootstate
|
||||
else
|
||||
echo "No valid slot found, resetting tries to 3"
|
||||
setenv BOOT_A_LEFT 3
|
||||
setenv BOOT_B_LEFT 3
|
||||
run storebootstate
|
||||
reset
|
||||
fi
|
||||
|
||||
echo "Starting kernel"
|
||||
booti ${kernel_addr_r} - ${fdt_addr_r}
|
||||
|
||||
echo "Boot failed, resetting..."
|
||||
reset
|
||||
|
|
@ -0,0 +1 @@
|
|||
|
||||
|
|
@ -0,0 +1,168 @@
|
|||
BR2_aarch64=y
|
||||
BR2_TOOLCHAIN_BUILDROOT_CXX=y
|
||||
BR2_DL_DIR="/cache/dl"
|
||||
BR2_CCACHE=y
|
||||
BR2_CCACHE_DIR="/cache/cc"
|
||||
BR2_OPTIMIZE_2=y
|
||||
BR2_ENABLE_LTO=y
|
||||
BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches $(BR2_EXTERNAL_HASSOS_PATH)/patches-rockchip $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-m1s/patches"
|
||||
BR2_SSP_REGULAR=y
|
||||
BR2_TARGET_GENERIC_HOSTNAME="homeassistant"
|
||||
BR2_TARGET_GENERIC_ISSUE="Welcome to Home Assistant"
|
||||
BR2_INIT_SYSTEMD=y
|
||||
# BR2_TARGET_GENERIC_REMOUNT_ROOTFS_RW is not set
|
||||
BR2_ROOTFS_OVERLAY="$(BR2_EXTERNAL_HASSOS_PATH)/rootfs-overlay"
|
||||
BR2_ROOTFS_POST_BUILD_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-build.sh"
|
||||
BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
|
||||
BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-m1s $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-m1s/hassos-hook.sh"
|
||||
BR2_LINUX_KERNEL=y
|
||||
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
|
||||
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.6.16"
|
||||
BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
|
||||
BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/v6.6.y/kernel-arm64-rockchip.config"
|
||||
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/v6.6.y/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/v6.6.y/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/v6.6.y/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/v6.6.y/device-support-wireless.config $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-m1s/kernel.config"
|
||||
BR2_LINUX_KERNEL_LZ4=y
|
||||
BR2_LINUX_KERNEL_DTS_SUPPORT=y
|
||||
BR2_LINUX_KERNEL_INTREE_DTS_NAME="rockchip/rk3566-odroid-m1s"
|
||||
BR2_LINUX_KERNEL_DTB_OVERLAY_SUPPORT=y
|
||||
BR2_LINUX_KERNEL_NEEDS_HOST_OPENSSL=y
|
||||
BR2_LINUX_KERNEL_NEEDS_HOST_LIBELF=y
|
||||
BR2_PACKAGE_BUSYBOX_CONFIG="$(BR2_EXTERNAL_HASSOS_PATH)/busybox.config"
|
||||
BR2_PACKAGE_BUSYBOX_INDIVIDUAL_BINARIES=y
|
||||
BR2_PACKAGE_V4L2LOOPBACK=y
|
||||
BR2_PACKAGE_JQ=y
|
||||
BR2_PACKAGE_CIFS_UTILS=y
|
||||
BR2_PACKAGE_DOSFSTOOLS=y
|
||||
BR2_PACKAGE_DOSFSTOOLS_FSCK_FAT=y
|
||||
BR2_PACKAGE_E2FSPROGS=y
|
||||
BR2_PACKAGE_E2FSPROGS_E2IMAGE=y
|
||||
BR2_PACKAGE_NFS_UTILS=y
|
||||
# BR2_PACKAGE_NFS_UTILS_RPC_NFSD is not set
|
||||
BR2_PACKAGE_LINUX_FIRMWARE=y
|
||||
BR2_PACKAGE_LINUX_FIRMWARE_COMPRESS=y
|
||||
BR2_PACKAGE_LINUX_FIRMWARE_COMPRESS_ZSTD=y
|
||||
BR2_PACKAGE_LINUX_FIRMWARE_MEDIATEK_MT7921_BT=y
|
||||
BR2_PACKAGE_LINUX_FIRMWARE_MEDIATEK_MT7922_BT=y
|
||||
BR2_PACKAGE_LINUX_FIRMWARE_QUALCOMM_6174A_BT=y
|
||||
BR2_PACKAGE_LINUX_FIRMWARE_RTL_87XX_BT=y
|
||||
BR2_PACKAGE_LINUX_FIRMWARE_RTL_88XX_BT=y
|
||||
BR2_PACKAGE_LINUX_FIRMWARE_ATHEROS_6003=y
|
||||
BR2_PACKAGE_LINUX_FIRMWARE_ATHEROS_6004=y
|
||||
BR2_PACKAGE_LINUX_FIRMWARE_ATHEROS_7010=y
|
||||
BR2_PACKAGE_LINUX_FIRMWARE_ATHEROS_9170=y
|
||||
BR2_PACKAGE_LINUX_FIRMWARE_ATHEROS_9271=y
|
||||
BR2_PACKAGE_LINUX_FIRMWARE_BRCM_BCM43XX=y
|
||||
BR2_PACKAGE_LINUX_FIRMWARE_BRCM_BCM43XXX=y
|
||||
BR2_PACKAGE_LINUX_FIRMWARE_MWIFIEX_SD8787=y
|
||||
BR2_PACKAGE_LINUX_FIRMWARE_MWIFIEX_SD8797=y
|
||||
BR2_PACKAGE_LINUX_FIRMWARE_MWIFIEX_USB8797=y
|
||||
BR2_PACKAGE_LINUX_FIRMWARE_MWIFIEX_USB8801=y
|
||||
BR2_PACKAGE_LINUX_FIRMWARE_MWIFIEX_SD8887=y
|
||||
BR2_PACKAGE_LINUX_FIRMWARE_MWIFIEX_SD8897=y
|
||||
BR2_PACKAGE_LINUX_FIRMWARE_MWIFIEX_USB8897=y
|
||||
BR2_PACKAGE_LINUX_FIRMWARE_MEDIATEK_MT7601U=y
|
||||
BR2_PACKAGE_LINUX_FIRMWARE_MEDIATEK_MT7610E=y
|
||||
BR2_PACKAGE_LINUX_FIRMWARE_MEDIATEK_MT76X2E=y
|
||||
BR2_PACKAGE_LINUX_FIRMWARE_MEDIATEK_MT7921=y
|
||||
BR2_PACKAGE_LINUX_FIRMWARE_MEDIATEK_MT7922=y
|
||||
BR2_PACKAGE_LINUX_FIRMWARE_RALINK_RT73=y
|
||||
BR2_PACKAGE_LINUX_FIRMWARE_RALINK_RT2XX=y
|
||||
BR2_PACKAGE_LINUX_FIRMWARE_RTL_81XX=y
|
||||
BR2_PACKAGE_LINUX_FIRMWARE_RTL_87XX=y
|
||||
BR2_PACKAGE_LINUX_FIRMWARE_RTL_RTW88=y
|
||||
BR2_PACKAGE_LINUX_FIRMWARE_RTL_RTW89=y
|
||||
BR2_PACKAGE_LINUX_FIRMWARE_RTL_815X=y
|
||||
BR2_PACKAGE_LINUX_FIRMWARE_USB_SERIAL_TI=y
|
||||
BR2_PACKAGE_DBUS_BROKER=y
|
||||
BR2_PACKAGE_GPTFDISK=y
|
||||
BR2_PACKAGE_GPTFDISK_SGDISK=y
|
||||
# BR2_PACKAGE_LVM2_STANDARD_INSTALL is not set
|
||||
BR2_PACKAGE_RTL8812AU_AIRCRACK_NG=y
|
||||
BR2_PACKAGE_USB_MODESWITCH_DATA=y
|
||||
BR2_PACKAGE_CA_CERTIFICATES=y
|
||||
BR2_PACKAGE_LIBCURL_CURL=y
|
||||
BR2_PACKAGE_LIBDNET=y
|
||||
BR2_PACKAGE_LIBCGROUP=y
|
||||
BR2_PACKAGE_LIBCGROUP_TOOLS=y
|
||||
BR2_PACKAGE_BLUEZ5_UTILS=y
|
||||
BR2_PACKAGE_BLUEZ5_UTILS_CLIENT=y
|
||||
BR2_PACKAGE_BLUEZ5_UTILS_TOOLS=y
|
||||
BR2_PACKAGE_BLUEZ5_UTILS_DEPRECATED=y
|
||||
BR2_PACKAGE_BLUEZ5_UTILS_PLUGINS_AUDIO=y
|
||||
BR2_PACKAGE_BLUEZ5_UTILS_PLUGINS_HID=y
|
||||
BR2_PACKAGE_DHCP=y
|
||||
BR2_PACKAGE_DHCP_CLIENT=y
|
||||
BR2_PACKAGE_DROPBEAR=y
|
||||
# BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set
|
||||
BR2_PACKAGE_IPROUTE2=y
|
||||
BR2_PACKAGE_IPTABLES_NFTABLES=y
|
||||
BR2_PACKAGE_IPTABLES_NFTABLES_DEFAULT=y
|
||||
BR2_PACKAGE_NETWORK_MANAGER=y
|
||||
BR2_PACKAGE_NETWORK_MANAGER_CLI=y
|
||||
BR2_PACKAGE_RPCBIND=y
|
||||
BR2_PACKAGE_WIRELESS_REGDB=y
|
||||
BR2_PACKAGE_WPA_SUPPLICANT=y
|
||||
BR2_PACKAGE_WPA_SUPPLICANT_WEXT=y
|
||||
BR2_PACKAGE_WPA_SUPPLICANT_AP_SUPPORT=y
|
||||
BR2_PACKAGE_WPA_SUPPLICANT_WPA3=y
|
||||
BR2_PACKAGE_WPA_SUPPLICANT_DBUS=y
|
||||
BR2_PACKAGE_WPA_SUPPLICANT_DBUS_INTROSPECTION=y
|
||||
BR2_PACKAGE_APPARMOR=y
|
||||
BR2_PACKAGE_APPARMOR_PROFILES=y
|
||||
BR2_PACKAGE_TINI=y
|
||||
BR2_PACKAGE_DOCKER_CLI=y
|
||||
BR2_PACKAGE_DOCKER_ENGINE=y
|
||||
BR2_PACKAGE_PROCPS_NG=y
|
||||
BR2_PACKAGE_RAUC=y
|
||||
BR2_PACKAGE_RAUC_DBUS=y
|
||||
BR2_PACKAGE_RAUC_NETWORK=y
|
||||
BR2_PACKAGE_SYSTEMD_JOURNAL_REMOTE=y
|
||||
BR2_PACKAGE_SYSTEMD_COREDUMP=y
|
||||
# BR2_PACKAGE_SYSTEMD_HWDB is not set
|
||||
BR2_PACKAGE_SYSTEMD_LOGIND=y
|
||||
# BR2_PACKAGE_SYSTEMD_NETWORKD is not set
|
||||
BR2_PACKAGE_SYSTEMD_RANDOMSEED=y
|
||||
BR2_PACKAGE_UTIL_LINUX_LOGIN=y
|
||||
BR2_PACKAGE_UTIL_LINUX_NOLOGIN=y
|
||||
BR2_PACKAGE_UTIL_LINUX_PARTX=y
|
||||
BR2_PACKAGE_UTIL_LINUX_SULOGIN=y
|
||||
BR2_PACKAGE_UTIL_LINUX_ZRAMCTL=y
|
||||
BR2_TARGET_ROOTFS_SQUASHFS=y
|
||||
BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y
|
||||
# BR2_TARGET_ROOTFS_TAR is not set
|
||||
BR2_TARGET_UBOOT=y
|
||||
BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
|
||||
BR2_TARGET_UBOOT_CUSTOM_GIT=y
|
||||
BR2_TARGET_UBOOT_CUSTOM_REPO_URL="https://github.com/u-boot/u-boot.git"
|
||||
BR2_TARGET_UBOOT_CUSTOM_REPO_VERSION="v2024.01"
|
||||
BR2_TARGET_UBOOT_BOARD_DEFCONFIG="odroid-m1s-rk3566"
|
||||
BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-m1s/uboot.config"
|
||||
BR2_TARGET_UBOOT_NEEDS_PYLIBFDT=y
|
||||
BR2_TARGET_UBOOT_NEEDS_PYELFTOOLS=y
|
||||
BR2_TARGET_UBOOT_NEEDS_ATF_BL31=y
|
||||
BR2_TARGET_UBOOT_NEEDS_ATF_BL31_ELF=y
|
||||
BR2_TARGET_UBOOT_NEEDS_TPL=y
|
||||
BR2_TARGET_UBOOT_FORMAT_CUSTOM=y
|
||||
BR2_TARGET_UBOOT_FORMAT_CUSTOM_NAME="u-boot-rockchip.bin"
|
||||
BR2_PACKAGE_HOST_DOSFSTOOLS=y
|
||||
BR2_PACKAGE_HOST_E2FSPROGS=y
|
||||
BR2_PACKAGE_HOST_GPTFDISK=y
|
||||
BR2_PACKAGE_HOST_MTOOLS=y
|
||||
BR2_PACKAGE_HOST_RAUC=y
|
||||
BR2_PACKAGE_HOST_UBOOT_TOOLS=y
|
||||
BR2_PACKAGE_HOST_UBOOT_TOOLS_BOOT_SCRIPT=y
|
||||
BR2_PACKAGE_HOST_UBOOT_TOOLS_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-m1s/uboot-boot.ush"
|
||||
BR2_PACKAGE_GASKET=y
|
||||
BR2_PACKAGE_HASSIO=y
|
||||
BR2_PACKAGE_HASSIO_ARCH="aarch64"
|
||||
BR2_PACKAGE_HASSIO_MACHINE="odroid-m1"
|
||||
BR2_PACKAGE_OS_AGENT=y
|
||||
BR2_PACKAGE_OS_AGENT_BOARD="OdroidM1S"
|
||||
BR2_PACKAGE_ROCKCHIP_BLOBS=y
|
||||
BR2_PACKAGE_ROCKCHIP_BLOBS_VERSION="b4558da0860ca48bf1a571dd33ccba580b9abe23"
|
||||
BR2_PACKAGE_ROCKCHIP_BLOBS_ATF="bin/rk35/rk3568_bl31_v1.43.elf"
|
||||
BR2_PACKAGE_ROCKCHIP_BLOBS_TPL="bin/rk35/rk3566_ddr_1056MHz_v1.18.bin"
|
||||
BR2_PACKAGE_RPI_RF_MOD=y
|
||||
BR2_PACKAGE_RTL88X2BU=y
|
||||
BR2_PACKAGE_HOST_TEMPIO=y
|
||||
BR2_PACKAGE_UDISKS2=y
|
||||
|
|
@ -162,9 +162,9 @@ function _create_disk_gpt() {
|
|||
# Make sure boot partition is shifted by SPL size
|
||||
boot_offset=$((boot_offset+$(size2sectors "${BOOT_SPL_SIZE}")))
|
||||
fi
|
||||
if [ "${BOARD_ID}" == "odroid-m1" ]; then
|
||||
if [ "${BOARD_ID}" == "odroid-m1" ] || [ "${BOARD_ID}" == "odroid-m1s" ]; then
|
||||
# Create partition for U-Boot binary (required by Hardkernel SPL to boot
|
||||
# using default petitboot SPI
|
||||
# using default petitboot SPI
|
||||
sgdisk -n "0:16384:+8M" -c 0:"uboot" -t 0:"21686148-6449-6E6F-744E-656564454649" "${hdd_img}"
|
||||
fi
|
||||
sgdisk -n "0:${boot_offset}:+$(get_boot_size)" -c 0:"hassos-boot" -t 0:"C12A7328-F81F-11D2-BA4B-00A0C93EC93B" -u 0:${BOOT_UUID} "${hdd_img}"
|
||||
|
|
|
|||
Loading…
Reference in New Issue